PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 169

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PIC17C756-16/SP

Manufacturer Part Number
PIC17C756-16/SP
Description
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756-16/SP

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
PIC17C756-16/P

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-16/SP
Manufacturer:
MICROCHIP
Quantity:
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Manufacturer:
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Quantity:
6 243
The ADRESH:ADRESL registers contains the 10-bit
result of the A/D conversion. When the A/D conversion
is complete, the result is loaded into this A/D result reg-
ister pair, the GO/DONE bit (ADCON0<2>) is cleared,
and A/D interrupt flag bit ADIF is set. The block dia-
grams of the A/D module are shown in Figure 16-3.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding DDR bits selected as inputs.
To determine acquisition time, see Section 16.1. After
this acquisition time has elapsed the A/D conversion
can be started. The following steps should be followed
for doing an A/D conversion:
1.
FIGURE 16-3: A/D BLOCK DIAGRAM
1997 Microchip Technology Inc.
Configure the A/D module:
• Configure analog pins / voltage reference /
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
and digital I/O (ADCON1)
Converter
A/D
(Reference
voltage)
V
V
REF
REF
-
+
(Input voltage)
V
IN
PCFG0
Preliminary
AV
DD
AV
2.
3.
4.
5.
6.
7.
SS
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Clear GLINTD bit
Wait the required acquisition time.
Start conversion:
• Set GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read
(ADRESH:ADRESL), clear bit ADIF if required.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before next acquisition starts.
CHS3:CHS0
A/D
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
AD
. A minimum wait of 2T
Result
DS30264A-page 169
register
AN11
AN1
AN10
AN9
AN8
AN7
AN2
AN0
AN6
AN5
AN4
AN3
AD
pair
is

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