PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 274

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PIC17C756-16/SP

Manufacturer Part Number
PIC17C756-16/SP
Description
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756-16/SP

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
PIC17C756-16/P

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-16/SP
Manufacturer:
MICROCHIP
Quantity:
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Part Number:
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Manufacturer:
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Quantity:
6 243
FIGURE F-2:
DS30264A-page 274
bit7
bit 7-6: FS3:FS2: FSR1 Mode Select bits
bit 5-4: FS1:FS0: FSR0 Mode Select bits
bit 3:
bit 2:
bit 1:
bit 0:
R/W - 1 R/W - 1 R/W - 1 R/W - 1 R/W - x
FS3
00 = Post auto-decrement FSR1 value
01 = Post auto-increment FSR1 value
1x = FSR1 value does not change
00 = Post auto-decrement FSR0 value
01 = Post auto-increment FSR0 value
1x = FSR0 value does not change
OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit magnitude,
which causes the sign bit (bit7) to change state.
1 = Overflow occurred for signed arithmetic, (in this arithmetic operation)
0 = No overflow occurred
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The results of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit
For ADDWF and ADDLW instructions.
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: carry/borrow bit
For ADDWF and ADDLW instructions.
1 = A carry-out from the most significant bit of the result occurred
0 = No carry-out from the most significant bit of the result
FS2
Note: For borrow the polarity is reversed.
Note that a subtraction is executed by adding the two’s complement of the second operand. For
rotate (RRCF, RLCF) instructions, this bit is loaded with either the high or low order bit of the source
register.
Note: For borrow the polarity is reversed.
ALUSTA REGISTER (ADDRESS: 04h, UNBANKED)
FS1
FS0
OV
Preliminary
R/W - x
Z
R/W - x
DC
R/W - x
C
bit0
R = Readable bit
W = Writable bit
-n = Value at POR reset
(x = unknown)
1997 Microchip Technology Inc.

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