PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 144

• Manufacturer Part Number: PIC17C756-16/SP
• Description: MICRO CTRL 16K MEMORY OTP 64SDIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-16/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Other names: PIC17C756-16/P

15.2.7
To initiate a START condition the user sets the start
condition enable bit or SEN bit (SSPCON2<0>). If the
SDA and SCL pins are sampled high, the baud rate
generator
SSPADD<6:0>, and starts its count. If SCL and SDA
are both sampled high when the baud rate generator
times out (T
of the SDA being driven low while SCL is high is the
START condition, and causes the S bit (SSPSTAT<3>)
to be set. Since the I
mode, a '1' in the S bit causes the SSPIF flag to be
set. Following this, the baud rate generator is reloaded
with the contents of SSPADD<6:0> and resumes its
count. When the baud rate generator times out (T
the SEN bit in the SSPCON2 register will be automati-
cally cleared, the baud rate generator is suspended
leaving the SDA line held low, and the START condi-
tion is complete.
FIGURE 15-23: FIRST START BIT TIMING
DS30264A-page 144
Write to SSPCON2<0> occurs here.
I
TIMING
2
C MASTER MODE START CONDITION
BRG
is
), the SDA pin is driven low. The action
re-loaded
SDA
SCL
2
C module is configured in master
with
SDA = 1,
SCL = 1
T
BRG
the
Set S bit (SSPSTAT<3>)
T
S
contents
BRG
At completion of start bit,
automatic clear SSPCON2<0>
BRG
Write to SSPBUF occurs here
Preliminary
T
BRG
of
)
1st Bit
T
BRG
15.2.7.1
If the user writes the SSPBUF when an START
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
Note:
Note:
2nd Bit
If at the beginning of START condition the
SDA and SCL pins are already sampled
low, or if during the START condition the
SCL line is sampled low before the SDA
line is driven low, a bus collision occurs,
the Bus Collision Interrupt Flag (BCLIF) is
set, the START condition is aborted, and
the I
WCOL STATUS FLAG
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the START
condition is complete.
2
C module is reset into its IDLE state.
1997 Microchip Technology Inc.