PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 161

• Manufacturer Part Number: PIC17C756-16/SP
• Description: MICRO CTRL 16K MEMORY OTP 64SDIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-16/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Other names: PIC17C756-16/P

15.2.14.1 BUS COLLISION DURING A START
During a START condition, a bus collision occurs if:
a)
b)
During a START condition both the SDA and the SCL
pins are monitored.
If:
then:
The START condition begins with the SDA and SCL
pins de-asserted. When the SDA pin is sampled high,
the baud rate generator is loaded from SSPADD<6:0>
and counts down to 0. If the SCL pin is sampled low
while SDA is high, a bus collision occurs, because it is
assumed that another master is attempting to drive a
data '1' during the START condition.
FIGURE 15-38: BUS COLLISION DURING START CONDITION (SDA ONLY)
1997 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
SDA or SCL are sampled low at the beginning of
the START condition (Figure 15-38)
SCL is sampled low before SDA is asserted low.
(Figure 15-39)
the SDA pin is already low
or the SCL pin is already low,
the START condition is aborted,
and the BCLIF flag is set,
and the SSP module is reset to its IDLE state
(Figure 15-38).
CONDITION
condition if SDA = 1, SCL=1
Set SEN, enable start
SDA sampled low before
START condition.
S bit and SSPIF set because
SDA = 0, SCL = 1
. Set BCLIF,
SDA goes low before the SEN bit is set.
S bit and SSPIF set because
SDA = 0, SCL = 1
Set BCLIF.
Preliminary
SSPIF and BCLIF are
cleared in software.
If the SDA pin is sampled low during this count, the
BRG is reset and
(Figure 15-40). If however a '1' is sampled on the SDA
pin, the SDA pin is asserted low at the end of the BRG
count. The baud rate generator is then reloaded and
counts down to 0, and during this time, if the SCL pins
is sampled as '0', a bus collision does not occur. At
the end of the BRG count the SCL pin is asserted low.
Note:
SEN cleared automatically because of bus collision.
SSP module reset into idle state.
The reason that bus collision is not a factor
during a START condition is that no two
bus masters can assert a START condition
at the exact same time.
master will always assert SDA before the
other. This condition does not cause a bus
collision because the two masters must be
allowed to arbitrate the first address follow-
ing the START condition, and if the
address is the same, arbitration must be
allowed to continue into the data portion,
RESTART, or STOP conditions.
SSPIF and BCLIF are
cleared in software.
the SDA line is asserted early
DS30264A-page 161
Therefore, one