PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 89

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PIC17C756-16/SP

Manufacturer Part Number
PIC17C756-16/SP
Description
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756-16/SP

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
PIC17C756-16/P

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-16/SP
Manufacturer:
MICROCHIP
Quantity:
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Manufacturer:
MIC
Quantity:
6 243
12.3
Although TMR0 is a 16-bit timer/counter, only 8-bits at
a time can be read or written during a single instruction
cycle. Care must be taken during any read or write.
12.3.1
The problem in reading the entire 16-bit value is that
after reading the low (or high) byte, its value may
change from FFh to 00h.
Example 12-1 shows a 16-bit read. To ensure a proper
read, interrupts must be disabled during this routine.
EXAMPLE 12-1: 16-BIT READ
FIGURE 12-4: TMR0 TIMING: WRITE HIGH OR LOW BYTE
MOVPF
MOVPF
MOVFP
CPFSLT
RETURN
MOVPF
MOVPF
RETURN
1997 Microchip Technology Inc.
AD15:AD0
Instruction
executed
TMR0H
TMR0L
Fetch
Read/Write Consideration for TMR0
READING 16-BIT VALUE
ALE
TMR0L, TMPLO
TMR0H, TMPHI
TMPLO, WREG
TMR0L
TMR0L, TMPLO
TMR0H, TMPHI
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
T0
PC
;read low tmr0
;read high tmr0
;tmplo
;tmr0l < wreg?
;no then return
;read low tmr0
;read high tmr0
;return
MOVFP W,TMR0L
Write to TMR0L
T0+1
PC+1
wreg
Preliminary
MOVFP TMR0L,W
(Value = NT0)
Read TMR0L
New T0 (NT0)
PC+2
12.3.2
Since writing to either TMR0L or TMR0H will effectively
inhibit increment of that half of the TMR0 in the next
cycle (following write), but not inhibit increment of the
other half, the user must write to TMR0L first and
TMR0H second in two consecutive instructions, as
shown in Example 12-2. The interrupt must be dis-
abled. Any write to either TMR0L or TMR0H clears the
prescaler.
EXAMPLE 12-2: 16-BIT WRITE
12.4
Timer0 has an 8-bit prescaler. The prescaler assign-
ment is fully under software control; i.e., it can be
changed “on the fly” during program execution. When
changing the prescaler assignment, clearing the pres-
caler is recommended before changing assignment.
The value of the prescaler is “unknown,” and assigning
a value that is less then the present value makes it dif-
ficult to take this unknown time into account.
BSF
MOVFP
MOVFP
BCF
MOVFP TMR0L,W
WRITING A 16-BIT VALUE TO TMR0
Prescaler Assignments
CPUSTA, GLINTD ; Disable interrupts
RAM_L, TMR0L
RAM_H, TMR0H
CPUSTA, GLINTD ; Done, enable
(Value = NT0)
Read TMR0L
PC+3
MOVFP TMR0L,W
(Value = NT0 +1)
New T0+1
;
;
;
Read TMR0L
PC+4
interrupts
DS30264A-page 89

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