PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 52

• Manufacturer Part Number: PIC17C756-16/SP
• Description: MICRO CTRL 16K MEMORY OTP 64SDIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-16/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Other names: PIC17C756-16/P

7.7
The Program Counter (PC) is a 16-bit register. PCL,
the low byte of the PC, is mapped in the data memory.
PCL is readable and writable just as is any other regis-
ter. PCH is the high byte of the PC and is not directly
addressable. Since PCH is not mapped in data or pro-
gram memory, an 8-bit register PCLATH (PC high
latch) is used as a holding latch for the high byte of the
PC. PCLATH is mapped into data memory. The user
can read or write PCH through PCLATH.
The 16-bit wide PC is incremented after each instruc-
tion fetch during Q1 unless:
• Modified by a GOTO, CALL, LCALL, RETURN,
• Modified by an interrupt response
• Due to destination write to PCL by an instruction
“Skips” are equivalent to a forced NOP cycle at the
skipped address.
Figure 7-10 and Figure 7-11 show the operation of the
program counter for various situations.
FIGURE 7-10: PROGRAM COUNTER
FIGURE 7-11: PROGRAM COUNTER USING
DS30264A-page 52
RETLW, or RETFIE instruction
PC<15:13>
15
15
7
Program Counter Module
3
5 4
13
PCH
PCLATH
8
Internal data bus <8>
12
OPERATION
THE CALL AND GOTO
INSTRUCTIONS
PCLATH
PCH
5
8
8
8 7
8 7
0
Opcode
PCL
8
PCL
8
0
0
Preliminary
Using Figure 7-10, the operations of the PC and
PCLATH for different instructions are as follows:
a)
b)
c)
d)
e)
Using Figure 7-11, the operation of the PC and
PCLATH for GOTO and CALL instructions is as follows:
The read-modify-write only affects the PCL with the
result. PCH is loaded with the value in the PCLATH.
For example, ADDWF PCL will result in a jump within the
current page. If PC = 03F0h, WREG = 30h and
PCLATH = 03h before instruction, PC = 0320h after the
instruction. To accomplish a true 16-bit computed
jump, the user needs to compute the 16-bit destination
address, write the high byte to PCLATH and then write
the low value to PCL.
The following PC related operations do not change
PCLATH:
a)
b)
c)
LCALL instructions:
An 8-bit destination address is provided in the
instruction (opcode). PCLATH is unchanged.
PCLATH
Opcode<7:0>
Read instructions on PCL:
Any instruction that reads PCL.
PCL
PCH
Write instructions on PCL:
Any instruction that writes to PCL.
8-bit data
PCLATH
Read-Modify-Write instructions on PCL:
Any instruction that does a read-write-modify
operation on PCL, such as ADDWF PCL.
Read:
Write:
RETURN instruction:
Stack<MRU>
CALL, GOTO instructions:
A 13-bit destination address is provided in the
instruction (opcode).
Opcode<12:0>
PC<15:13>
Opcode<12:8>
LCALL, RETLW, and RETFIE instructions.
Interrupt vector is forced onto the PC.
Read-modify-write instructions on PCL (e.g.
BSF PCL).
data bus
PCLATH
PCL
8-bit result
PCLATH
PCH
PCH
data bus
PCLATH<7:5>
PC<15:0>
data bus
PCL
PC<12:0>
PCLATH<4:0>
ALU or destination
PCH
1997 Microchip Technology Inc.
data bus
PCL
ALU
PCL