MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 220
Manufacturer Part Number
IC MCU 20K 2MHZ OTP 52-PLCC
Specifications of MC68HC711E20CFN2
Number Of I /o
Program Memory Size
20KB (20K x 8)
Program Memory Type
512 x 8
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Common Bootstrap Mode Problems
Connecting RxD to V
Does Not Cause the SCI to Receive a Break
To force an immediate jump to the start of EEPROM, the bootstrap firmware looks for the first received
character to be $00 (or break). The data reception logic in the SCI looks for a 1-to-0 transition on the RxD
pin to synchronize to the beginning of a receive character. If the RxD pin is tied to ground, no 1-to-0
transition occurs. The SCI transmitter sends a break character when the bootloader firmware starts, and
this break character can be fed back to the RxD pin to cause the jump to EEPROM. Since TxD is
configured as an open-drain output, a pullup resistor is required.
$FF Character Is Required before Loading into RAM
The initial character (usually $FF) that sets the download baud rate is often forgotten.
Original M68HC11 Versions Required Exactly 256 Bytes to be Downloaded to RAM
Even users that know about the 256 bytes of download data sometimes forget the initial $FF that makes
the total number of bytes required for the entire download operation equal to 256 + 1 or 257 bytes.
When on-chip RAM surpassed 256 bytes, the time required to serially load this many characters became
more significant. The variable-length download feature allows shorter programs to be loaded without
sacrificing compatibility with earlier fixed-length download versions of the bootloader. The end of a
download is indicated by an idle RxD line for at least four character times. If a personal computer is being
used to send the download data to the MCU, there can be problems keeping characters close enough
together to avoid tripping the end-of-download detect mechanism. Using 1200 as the baud rate rather
than the faster default rate may help this problem.
Assemblers often produce S-record encoded programs which must be converted to binary before
bootloading them to the MCU. The process of reading S-record data from a file and translating it to binary
can be slow, depending on the personal computer and the programming language used for the
translation. One strategy that can be used to overcome this problem is to translate the file into binary and
store it into a RAM array before starting the download process. Data can then be read and downloaded
without the translation or file-read delays.
The end-of-download mechanism goes into effect when the initial $FF is received to set the baud rate.
Any amount of time may pass between reset and when the $FF is sent to start the download process.
EPROM/OTP Versions of M68HC11 Have an EPROM Emulation Mode
The conditions that configure the MCU for EPROM emulation mode are essentially the same as those for
resetting the MCU in bootstrap mode. While RESET is low and mode select pins are configured for
bootstrap mode (low), the MCU is configured for EPROM emulation mode.
The port pins that are used for EPROM data I/O lines may be inputs or outputs, depending on the pin that
is emulating the EPROM output enable pin (OE). To make these data pins appear as high-impedance
inputs as they would on a non-EPROM part in reset, connect the PB7/(OE) pin to a pullup resistor.
M68HC11 Bootstrap Mode, Rev. 1.1