MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 31

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Table
Number
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
3-1
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
Freescale Semiconductor
CCR Field Descriptions .......................................................................................................... 2-6
MOVEC Register Map............................................................................................................. 2-7
Status Field Descriptions ........................................................................................................ 2-8
Integer Data Formats .............................................................................................................. 2-9
User-Mode Instruction Set Summary .................................................................................... 2-15
Move Byte and Word Execution Times ................................................................................. 2-20
One-Operand Instruction Execution Times ........................................................................... 2-22
Two-Operand Instruction Execution Times ........................................................................... 2-22
Miscellaneous Instruction Execution Times .......................................................................... 2-24
General Branch Instruction Execution Times........................................................................ 2-25
Exception Vector Assignments ............................................................................................. 2-26
Format Field Encoding .......................................................................................................... 2-27
Fault Status Encodings ......................................................................................................... 2-28
MCF5272 Exceptions .......................................................................................................... 2-28
MAC Instruction Summary ...................................................................................................... 3-4
Memory Map of Instruction Cache Registers .......................................................................... 4-2
RAMBAR Field Description ..................................................................................................... 4-3
Examples of Typical RAMBAR Settings.................................................................................. 4-4
ROMBAR Field Description..................................................................................................... 4-6
Examples of Typical ROMBAR Settings ................................................................................. 4-6
Instruction Cache Operation as Defined by CACR[CENB,CEIB].......................................... 4-11
Memory Map of Instruction Cache Registers ........................................................................ 4-12
CACR Field Descriptions ...................................................................................................... 4-13
ACRn Field Descriptions ....................................................................................................... 4-14
Debug Module Signals ............................................................................................................ 5-2
Processor Status Encoding..................................................................................................... 5-3
BDM/Breakpoint Registers...................................................................................................... 5-6
Rev. A Shared BDM/Breakpoint Hardware ............................................................................. 5-7
AATR Field Descriptions ......................................................................................................... 5-7
ABLR Field Description ........................................................................................................... 5-9
ABHR Field Description .......................................................................................................... 5-9
CSR Field Descriptions ......................................................................................................... 5-10
DBR Field Descriptions ......................................................................................................... 5-12
ColdFire Effective Addressing Modes .................................................................................. 2-12
Notational Conventions ........................................................................................................ 2-13
Supervisor-Mode Instruction Set Summary ......................................................................... 2-18
Misaligned Operand References.......................................................................................... 2-19
Move Long Execution Times................................................................................................ 2-21
Move Execution Times......................................................................................................... 2-21
Bcc Instruction Execution Times .......................................................................................... 2-25
MCF5272 ColdFire
®
Integrated Microprocessor User’s Manual, Rev. 3
List of Tables
Title
Number
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xxxi