MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 51
![IC MPU 66MHZ COLDFIRE 196-MAPBGA](/photos/13/93/139389/mcf5272vm66_sml.jpg)
MCF5272VM66
Manufacturer Part Number
MCF5272VM66
Description
IC MPU 66MHZ COLDFIRE 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272VM66
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Cpu Speed
66MHz
Embedded Interface Type
UART, QSPI, USB, TDM
Digital Ic Case Style
BGA
No. Of Pins
196
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
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Freescale Semiconductor
0x0050
0x0054
0x0058
0x005C
0x0060
0x0064
0x0068
0x006C
0x0070
0x0074
0x0078
0x007C
0x00A0
0x00A4
0x00A8
0x0080
0x0084
0x0086
0x0088
0x008C
0x008E
0x0094
0x0096
0x0098
MBAR
MBAR
MBAR
Offset
Offset
Offset
CS Base Register 2
CS Option Register 2
CS Base Register 3
CS Option Register 3
CS Base Register 4
CS Option Register 4
CS Base Register 5
CS Option Register 5
CS Base Register 6
CS Option Register 6
CS Base Register 7
CS Option Register 7
Port A Control Register
Port A Data Direction Register
Port A Data Register
Port B Control Register
Port B Data Direction Register
Port B Data Register
Port C Data Direction Register
Port C Data Register
Port D Control Register
QSPI Mode Register
QSPI Delay Register
QSPI Wrap Register
MCF5272 ColdFire
Table v. Chip Select Register Memory Map (continued)
Register Name
Register Name
Register Name
Table vi. GPIO Port Register Memory Map
Table vii. QSPI Module Memory Map
®
Integrated Microprocessor User’s Manual, Rev. 3
CSBR2
CSOR2
CSBR3
CSOR3
CSBR4
CSOR4
CSBR5
CSOR5
CSBR6
CSOR6
CSBR7
CSOR7
PACNT
PADDR
PADAT
PBCNT
PBDDR
PBDAT
PCDDR
PCDAT
PDCNT
SPMODE
SPDELAY
SPWRAP
Old Mnemonic
Old Mnemonic
Old Mnemonic
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
No change
QMR
QDLYR
QWR
New Mnemonic
New Mnemonic
New Mnemonic
li
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