MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 62

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Overview
1-2
DRAM Controller Outputs
SDRAM Controller
SCR
SPR
SDRAM Control
SDRAM Timer
JTAG
SDCR
SDTR
System Control
ALPR
PMR
WRRR
WIRR
MCF5272 ColdFire
Chip Select Module
WCR
WER
CSORs
Instruction
8
SYSTEM INTEGRATION MODULE (SIM)
CS[7:0]
Memory
Base Address
Local
Figure 1-1. MCF5272 Block Diagram
Bus
8
CSBRs
MBAR
®
8
Integrated Microprocessor User’s Manual, Rev. 3
IFP
OEP
Identification
Control Signals
ROMBAR
RAMBAR
Bus Interface
Decode, Select, Operand Fetch
FIFO Instruction Buffer (3 X 32)
V2 ColdFire Processor Complex
Instruction Address Generation
Address Generation, Execute
ACR0
ACR1
Instruction Cache
SRAM Controller
External
ROM Controller
32-Bit Address Bus
DIR
Controller
Instruction Fetch
32-Bit Data Bus
Local Memory
16-Kbyte
1-Kbyte
4-Kbyte
SRAM
Cache
CACR
ROM
PACNT–
PDCNT
Parallel Port
Interrupt Controller
31
4 ICRs
PADDR–
PCDDR
Instruction Unit
0
INT[6:1]
4-Entry
Store
Buffer
Local Memory
Data Bus
6
PADR–
PIWR
PCDR
PITR
PIVR
ISR
Freescale Semiconductor
D[31:0]
Two UARTs
Purpose
Ethernet
General-
Timers
PWM
QSPI
Four
PLIC
DMA
USB