IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 18

• Manufacturer Part Number: IAR-KSK-IMX25
• Description: KIT DEVELOPMENT I.MX257, ARM926
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r
• Type: MCUr

Specifications of IAR-KSK-IMX25

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: I.MX257
• Processor Series: i.MX25
• Data Bus Width: 16 bit
• Interface Type: UART, JTAG, USB, Ethernet, SD/MMC
• Core: ARM926EJ-S
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: I.MX2
• Silicon Family Name: I.MX25
• Mcu Supported Families: I.MX25
• For Use With/related Products: i.MX25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.3
Table 15
and temperature conditions. These values are derived from the i.MX25 with core clock speed up to
400 MHz. Additionally, no power saving techniques such as clock gating were implemented when
measuring these values. Common supplies are bundled according to the i.MX25 power-up sequence
requirements. Peak numbers are provided for system designers so that the i.MX25 power supply
requirements are satisfied during startup and transient conditions. Freescale recommends that system
current measurements are taken with customer-specific use-cases to reflect the normal operating
conditions in the end system.
18
In addition, the following power-down sequence is recommended:
QVDD
NVCC_EMI1, NVCC_EMI2
NVCC_CRM, NVCC_SDIO, NVCC_CSI,
NVCC_NFC, NVCC_JTAG, NVCC_LCDC,
NVCC_MISC
MPLL_VDD, UPLL_VDD
5. Turn on all other analog power supplies including USBPHY1_VDDA_BIAS,
6. Negate the POR signal at least 90
1. Turn off power for analog parts, including USBPHY1_VDDA_BIAS, USBPHY1_UPLL_VDD,
2. Turn off QVDD.
3. Turn off NVCCx, PLL, OSC, and other powers.
USBPHY1_UPLL_VDD, USBPHY1_VDDA, USBPHY2_VDD, NVCC_ADC,
OSC24M_VDD, MPPLL_VDD, UPLL_VDD and FUSEVDD no less than 1ms and no greater
than 32 ms after QVDD reaches 90% of 1.2V. FUSEVDD is tied to GND if fuses are not being
programmed.
USBPHY1_VDDA, USBPHY2_VDD, NVCC_ADC, and FUSEVDD (FUSEVDD is tied to GND
if fuses are not being programmed).
shows values representing maximum current numbers for the i.MX25 under worst case voltage
Power Characteristics
This is to guarantee that analog peripherals can get properly initialized
(reset) values from QVDD domain and NVCCx domain.
This is to guarantee that both POR logic and clocks are stable inside the
MX25 chip, before POR is removed.
The power-down steps can be executed simultaneously, or very shortly one
after another.
Power Supply
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Table 15. Power Consumption
μs
after all previous steps.
NOTE
NOTE
NOTE
Voltage (V)
1.52
1.65
1.9
3.6
Max Current (mA)
Freescale Semiconductor
360
110
30
20