IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 73
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 73 of 154
- Download datasheet (2Mb)
Figure 39
timing parameters described in
Freescale Semiconductor
ADDR
DATA
BCLK
CS[x]
BCLK
EB[y]
ADDR
through
LBA
RW
CS[x]
OE
EB[y]
DATA
RW
LBA
OE
Figure 39. Synchronous Memory Timing Diagram for Read Access—WSC=1
Figure 44
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Figure 40. Synchronous Memory Timing Diagram for Write Access—
Last Valid Address
Last Valid Address
give examples of basic WEIM accesses to external memory devices with the
Table 56
WE14
WE14
WE10
WE12
WE4
WE6
WE6
WE8
WE4
WSC=1, EBWA=1, EBWN=1, LBN=1
WE12
WE16
for specific control parameter settings.
WE15
WE13
V1
V1
WE19
V1
V1
WE5
WE5
WE9
WE7
Next Address
WE11
WE21
WE15
WE13
WE7
Next Address
WE17
73
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