IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 20
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 20 of 154
- Download datasheet (2Mb)
3.5
This section includes the DC parameters of the following I/O types:
3.5.1
The DDR pad type is configured by the IOMUXC_SW_PAD_CTL_GRP_DDRTYPE register (see the
External Signals and Pin Multiplexing chapter of the i.MX25 Reference Manual for details).
20
1
2
3
4
Junction to ambient
Junction to ambient
Junction to ambient
Junction to ambient
Junction to boards
Junction to case (top)
Junction to package top
Junction-to-ambient thermal resistance determined per JEDC JESD51-3 and JESD51-6. Thermal test board meets JEDEC
specification for this package.
Junction-to-board thermal resistance determined per JEDC JESD51-8. Thermal test board meets JEDEC specification for
this package.
Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is
used for the case temperature. Reported value includes the thermal resistance of the interface layer.
Thermal characterization parameter indicating the temperature difference between the package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, this thermal characterization parameter is written
as Psi-JT.
•
•
•
•
Die Attach: 0.033 mm non-conductive die attach, k = 0.3 W/m K
Mold compound: Generic mold compound; k = 0.9 W/m K
DDR I/O: Mobile DDR (mDDR), double data rate (DDR2), or synchronous dynamic random
access memory (SDRAM)
General purpose I/O (GPIO)
I/O DC Parameters
DDR I/O DC Parameters
The term ‘OVDD’ in this section refers to the associated supply rail of an
input or output. The association is shown in the “Signal Multiplexing”
chapter of the reference manual.
2
1
1
1
1
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
natural convection
natural convection
(@200 ft/min)
(@200 ft/min)
3
Rating
4
Table 16. Thermal Resistance Data
Single layer board (1s)
Four layer board (2s2p)
Single layer board (1s)
Four layer board (2s2p)
Natural convection
NOTE
Condition
—
—
Symbol
R
R
R
R
R
R
eJCtop
Ψ
eJMA
eJMA
eJA
eJA
eJB
JT
Freescale Semiconductor
Value
55
33
46
29
22
13
2
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
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