IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 94
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 94 of 154
- Download datasheet (2Mb)
3.7.12
Figure 65
Table 72
1
94
T is pixel clock period
VSYNC
HSYNC
HSYNC
LSCLK
T1
T2
T3
T4
T5
T6
ID
LD
list the timing parameters used in the associated figures.
and
Liquid Crystal Display Controller (LCDC) Timing
Pixel clock period
HSYNC width
LD setup time
LD hold time
Wait between HSYNC and VSYNC rising edge
Wait between last data and HSYNC rising edge
Figure 66
T2
T5
Line 1
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
show LCDC timing in non-TFT and TFT mode respectively, and
Line 2
T3
T1
Table 71. LCDC Non-TFT Mode Timing Parameters
Figure 65. LCDC Non-TFT Mode Timing Diagram
Description
T4
Min.
22.5
1
5
5
2
1
Line n
Line 1
Freescale Semiconductor
1000
Max.
—
—
—
—
—
T6
Table 71
Unit
and
ns
T
ns
ns
T
T
1
1
1
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