IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 98
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 98 of 154
- Download datasheet (2Mb)
SIMx_DATAy_RX_TX
3.7.14.1
SIM cards may have internal reset, or active low reset. The following subset describes the reset sequences
in these two cases.
3.7.14.1.1
Figure 69
following steps:
Table 75
3.7.14.1.2
Figure 70
following steps:
98
SIMn_SVENm
SIMx_CLKy
•
•
•
•
•
•
•
•
After power-up, the clock signal is enabled on SIMx_CLKy (time T0)
After 200 clock cycles, SIMx_DATAy_RX_TX must be asserted.
The card must send a response on SIMx_DATAy_RX_TX acknowledging the reset between
400–40000 clock cycles after T0.
After power-up, the clock signal is enabled on SIMx_CLKy (time T0)
After 200 clock cycles, SIMx_DATAy_RX_TX must be asserted.
SIMx_RSTy must remain low for at least 40,000 clock cycles after T0 (no response is to be received
on RX during those 40,000 clock cycles)
SIMx_RSTy is asserted (at time T1)
SIMx_RSTy must remain asserted for at least 40,000 clock cycles after T1, and a response must be
received on SIMx_DATAy_RX_TX between 400 and 40,000 clock cycles after T1.
defines the general timing requirements for the SIM interface.
shows the reset sequence for SIM cards with active low reset. The reset sequence comprises the
shows the reset sequence for SIM cards with internal reset. The reset sequence comprises the
Ref No.
SIM Reset Sequences
1
2
SIM Cards with Internal Reset
SIM Cards with Active Low Reset
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
T0
Table 75. Timing Specifications, Internal Reset Card Reset Sequence
1
Figure 69. Internal Reset Card Reset Sequence
2
Min.
400
—
RESPONSE
40,000
Max.
200
clk cycles
clk cycles
Freescale Semiconductor
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