IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 85
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 85 of 154
- Download datasheet (2Mb)
1
2
3
4
Freescale Semiconductor
Card Input Clock
eSDHC Output / Card Inputs CMD, DAT (Reference to CLK)
eSDHC Input / Card Outputs CMD, DAT (Reference to CLK)
In low-speed mode, card clock must be lower than 400 kHz, voltage ranges from 2.7 to 3.6 V.
In normal-speed mode for SD/SDIO card, clock frequency can be any value between 0 ~ 25 MHz. In high speed mode, clock
frequency can be any value between 0 ~ 50 MHz.
In normal-speed mode for MMC card, clock frequency can be any value between 0 ~ 20 MHz. In high speed mode, clock
frequency can be any value between 0 ~ 52 MHz.
To satisfy hold timing, the delay difference between clock input and cmd/data input must not exceed 2 ns.
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
ID
Clock frequency (low speed)
Clock frequency (SD/SDIO full speed/high speed)
Clock frequency (MMC full speed/high speed)
Clock frequency (identification mode)
Clock low time
Clock high time
Clock rise time
Clock fall time
eSDHC output delay
eSDHC input setup time
eSDHC input hold time
output from eSDHCv2 to card
input from card to eSDHCv2
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Table 61. eSDHCv2 Interface Timing Specification
Parameter
DAT0
DAT1
DAT7
DAT0
DAT1
DAT3
CMD
CMD
CLK
......
......
Figure 54. eSDHCv2 Timing
SD3
SD5
SD6
SD2
SD7
SD4
SD8
Symbols
f
f
f
t
t
t
t
f
t
t
t
PP
PP
PP
TLH
THL
WH
ISU
OD
WL
OD
IH
4
1
2
3
SD1
Min.
100
6.5
6.5
2.5
2.5
–3
—
—
0
0
0
25/50
20/52
Max.
400
400
—
—
—
—
3
3
3
MHz
MHz
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
85
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