IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 57
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 57 of 154
- Download datasheet (2Mb)
3.7.6.1
3.7.6.1.1
The following diagrams and tables specify the timings related to the SDRAMC module which interfaces
SDRAM.
Freescale Semiconductor
SD1
SD2
SD3
SD4
SD5
ID
SDCLK
SDCLK
ADDR
DQM
RAS
CAS
WE
DQ
CS
SDRAM clock high-level width
SDRAM clock low-level width
SDRAM clock cycle time
CS, RAS, CAS, WE, DQM, CKE setup time
CS, RAS, CAS, WE, DQM, CKE hold time
ESDCTL Electrical Specifications
SDRAM Memory Controller
SD4
SD6
SD4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
ROW/BA
Table 44. DDR/SDR SDRAM Read Cycle Timing Parameters
SD5
Figure 25. SDRAM Read Cycle Timing Diagram
SD5
SD7
Parameter
SD10
1
SD4
COL/BA
1
SD4
SD4
SD5
SD5
SD5
SD8
Note: CKE is high during the read/write cycle.
Data
SD1
SD9
SD3
SD2
Symbol
tCMH
tCMS
tCH
tCK
tCL
Min.
3.4
3.4
7.5
2.0
1.8
Max.
4.1
4.1
—
—
—
Unit
ns
ns
ns
ns
ns
57
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