LFXP2-5E-5FTN256I Lattice, LFXP2-5E-5FTN256I Datasheet - Page 10

FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd

LFXP2-5E-5FTN256I

Manufacturer Part Number
LFXP2-5E-5FTN256I
Description
FPGA - Field Programmable Gate Array 5K LUTs 172 I/O Inst on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-5E-5FTN256I

Number Of Macrocells
5000
Number Of Programmable I/os
172
Data Ram Size
169984
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FTBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
169984
Number Of I /o
172
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice
Quantity:
135
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
23
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFXP2-5E-5FTN256I
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
LatticeXP2 Soft Error Detection (SED) Usage Guide
LatticeXP2 Dual Boot Feature
Introduction ...................................................................................................................................................... 16-1
SED Overview.................................................................................................................................................. 16-1
Basic SED and One-shot SED Modes ............................................................................................................. 16-2
Hardware Description....................................................................................................................................... 16-2
Signal Descriptions .......................................................................................................................................... 16-2
SED Flow ......................................................................................................................................................... 16-4
SED Run Time ................................................................................................................................................. 16-5
Sample Code ................................................................................................................................................... 16-6
Technical Support Assistance.......................................................................................................................... 16-9
Revision History ............................................................................................................................................. 16-10
Introduction ...................................................................................................................................................... 17-1
Definitions ........................................................................................................................................................ 17-3
Purpose............................................................................................................................................................ 17-4
Resource.......................................................................................................................................................... 17-5
Dual Boot Mode ............................................................................................................................................... 17-6
Critical Points ................................................................................................................................................... 17-7
Programming Procedures ................................................................................................................................ 17-9
Basic SED ............................................................................................................................................... 16-2
One-Shot SED ........................................................................................................................................ 16-2
SEDCLKIN .............................................................................................................................................. 16-3
OSC_DIV ................................................................................................................................................ 16-3
SEDENABLE........................................................................................................................................... 16-3
SEDCLKOUT .......................................................................................................................................... 16-3
SEDSTART ............................................................................................................................................. 16-3
SEDFRCERRN ....................................................................................................................................... 16-3
SEDINPROG........................................................................................................................................... 16-4
SEDDONE .............................................................................................................................................. 16-4
SEDERR ................................................................................................................................................. 16-4
Basic SED VHDL Example ..................................................................................................................... 16-6
One Shot SED in VHDL .......................................................................................................................... 16-7
Basic SED Verilog Example.................................................................................................................... 16-8
One-Shot SED in Verilog ........................................................................................................................ 16-9
Dual Boot Feature ................................................................................................................................... 17-2
SPI .......................................................................................................................................................... 17-3
Master SPI .............................................................................................................................................. 17-3
SDM (Self Download Mode).................................................................................................................... 17-3
Erase....................................................................................................................................................... 17-3
Program .................................................................................................................................................. 17-3
Configure................................................................................................................................................. 17-3
Primary Boot ........................................................................................................................................... 17-3
Golden Boot ............................................................................................................................................ 17-3
Dual Boot ................................................................................................................................................ 17-4
Refresh.................................................................................................................................................... 17-4
Bitstream Data File (.BIT File)................................................................................................................. 17-4
JEDEC File (.JED File)............................................................................................................................ 17-4
TransFR .................................................................................................................................................. 17-4
Security ................................................................................................................................................... 17-4
SED CRC ................................................................................................................................................ 17-4
One Shot SED......................................................................................................................................... 17-4
Background Mode (User Mode) .............................................................................................................. 17-4
Direct Mode (IEEE 1532 Access Modal State) ....................................................................................... 17-4
Part 1: Program the Golden Pattern into the SPI Flash Devices ............................................................ 17-9
9
LatticeXP2 Family Handbook
Table of Contents

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