ISL6534CRZ Intersil, ISL6534CRZ Datasheet - Page 11

• Manufacturer Part Number: ISL6534CRZ
• Description: IC CTRLR PWM DUAL LINEAR 32QFN
• Manufacturer: Intersil

Specifications of ISL6534CRZ

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (1)
• Function: Any Function
• Number Of Outputs: 3
• Frequency - Switching: 300kHz ~ 1MHz
• Voltage/current - Output 1: Controller
• Voltage/current - Output 2: Controller
• Voltage/current - Output 3: Controller
• W/led Driver: No
• W/supervisor: No
• W/sequencer: Yes
• Voltage - Supply: 3.3 V ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

variable one (determined by the duty cycle). LG1 is shown
with a pulse width shorter than LG2; this is just an arbitrary
example, and it does not affect the rising edges.
Output Regulation
The basic PWM regulator voltage is usually set up as
follows: FB and the internal reference are the two inputs to
the error amplifier, which are forced to be equal. The output
voltage is externally divided down to the FB pin, to equal the
reference. In the ISL6534, VOUT1 uses an internal nominal
0.6V reference; VOUT2 uses an external REFIN pin for the
reference. There are many variations of the above,
especially when the modes (Independent or DDR) are also
considered. Below are some of the cases that can be used,
along with the advantages or disadvantages of each.
The following figures show the compensation circuit for
VOUT1 and VOUT2; they include a full type-3 compensation
network. Also shown is the resistor divider for REFIN.
Several notes:
1. The labeling of the resistors may not match other
2. The VREF pin (nominal 3.3V) is assumed here (the
3. One percent (or better) resistors are typically used for
FIGURE 4. PHASE OF LG2 WITH RESPECT TO RISING EDGE
diagrams; they should be used just for the equations
included.
VREF pin supplies a soft-start ramp that other external
sources may not), but any other appropriate fixed voltage
reference can be used as REFIN for OUT2.
these resistor dividers; the overall system accuracy
depends directly upon them. Exact ratios are not always
possible, due to the limited values of standard resistors
available; these errors must also be added to the
tolerance.
0
OF LG1
90
180
11
270
0
LG1
LG2 (0 degree)
LG2 (90 degree)
LG2 (180 degree)
ISL6534
VOUT1 (INDEPENDENT OR DDR MODE)
Figure 5 shows the resistors for VOUT1, and the equation
below shows that R5 and R6 divide VOUT1 down to match
the 0.6V internal reference. VOUT1 must be greater than
0.6V and 2 resistors are needed, and their accuracy directly
affect the regulator tolerance.
Use the following equation to choose the resistor values. R5
is part of the compensation network, and should be selected
to be compatible; 1kΩ is a good starting value. Find FB1
from the Specification Table for the right condition, plug in
the desired value for VOUT1, and solve for R6.
VOUT2 (INDEPENDENT MODE)
Figure 6 shows the resistors for VOUT2; it is similar to
VOUT1 in that 2 resistors divide down VOUT2 to FB2; the
difference is that a second resistor divider may be used to
divide an external reference REF (such as VREF pin; see
Specification Table for details) or some other voltage (such
as VOUT1 for DDR mode).
Use the following equations; first decide what reference will
be used (REF), and whether it will be divided down (to
REFIN); choose a nominal value for R3 (such as 1kΩ) and
solve for R4. Assume a value for R1 (part of the
compensation calculation); 1kΩ is good starting value. Now
that REFIN is determined, plug it in for FB2, plug in the
desired VOUT2, and solve for R4.
The same equations are used for following cases; some of
them get simplified by removing one or both dividers.
Case 1 is the most general case (no restriction on VREF > or
< VOUT2), and the most flexible. Both VREF and the output
are divided down to the same arbitrary reference (in the 0.6V
FB1
R6
R4
R2
FIGURE 5. RESISTOR DIVIDER FOR VOUT1 (DDR OR
=
=
=
=
VOUT1
---------------------------------------
VOUT1 FB1
--------------------------------------
REF REFIN
---------------------------------------
VOUT2 FB2
REFIN R3
VOUT1
FB1 R5
FB2 R1
–
⋅
⋅
INDEPENDENT MODE)
–
–
⋅
⋅
--------------------- -
R5
R6
R5
+
R6
COMP1
FB1
R6
0.6V
EA
November 18, 2005
FN9134.2