ISL6534CRZ Intersil, ISL6534CRZ Datasheet - Page 12

• Manufacturer Part Number: ISL6534CRZ
• Description: IC CTRLR PWM DUAL LINEAR 32QFN
• Manufacturer: Intersil

Specifications of ISL6534CRZ

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (1)
• Function: Any Function
• Number Of Outputs: 3
• Frequency - Switching: 300kHz ~ 1MHz
• Voltage/current - Output 1: Controller
• Voltage/current - Output 2: Controller
• Voltage/current - Output 3: Controller
• W/led Driver: No
• W/supervisor: No
• W/sequencer: Yes
• Voltage - Supply: 3.3 V ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

to 3.3V range for best performance). The advantage is that if
either the VREF or desired output voltage changes going
forward, the only board change needed is the value of 1 or
more resistors. The disadvantage is that since there are two
resistor dividers, both of them add to the error budget of the
regulator output. The total number of resistors used is 4.
Case 2 can be used when VOUT2 is less than VREF. R3 and
R4 divide the reference to match VOUT2. It saves a resistor
(R2); R1 (usually ~1kΩ) is still needed as part of the
compensation, but it doesn’t affect the accuracy of the output.
Three resistors are needed; this is the most typical case.
Case 3 can be used only when VOUT2 is greater than
VREF, which is brought directly into REFIN; then VOUT2 is
divided down to match it. Only two resistors (R1, R2) are
needed, and both affect the accuracy.
Case 4 can be used only if VREF = VOUT2; this case is the
most accurate (since neither has a divider), and only uses
one resistor (R1, as part of the compensation). Make sure
REFIN has sufficient headroom to VCC.
VOUT2 (DDR MODE)
The main difference for DDR Mode is that rather than using
a fixed external reference for REFIN, a reference based on
VOUT1 (which is also called VDDQ for DDR) is used
instead. See Figure 6. Use the same equations shown for
the Independent mode; just substitute VOUT1 for REF.
Case 1 is again the most general case; Both VOUT1 and the
VOUT2 output are divided down to the same arbitrary
reference (in the 0.6V to 3.3V range for best performance).
The trade-offs are the same as Case 1 for Independent
mode described earlier.
Case 2 can be used when VOUT2 is less than VOUT1,
which is the case for DDR (since VOUT2 = 1/2 VOUT1). It
saves a resistor (R2); R1 is still needed as part of the
compensation, but it doesn’t affect the accuracy of the
output. R3 and R4 divide the VOUT1 by 2 to match VOUT2.
FIGURE 6. RESISTOR DIVIDERS FOR VOUT2 AND REFIN
VOUT1 (DDR)
VREF (IND)
VOUT2
OR
R1
12
R3
FB2
REFIN
COMP2
R2
R4
EA
ISL6534
Three resistors are needed, two of which affect the accuracy.
Since the DDR mode almost always uses the divide by two,
no flexibility is lost here; just change the VOUT1 resistor
divider to change the value of VDDQ, and VOUT2 will still
track at 1/2 the value.
Cases 3 and 4 don’t apply for DDR.
Soft-Start/Enable
Numerous combinations of independent and dependent
start-up are possible by the various methods of connecting
the three SS/EN pins; some combinations are shown in
Figures 7 and 8. In Figure 7, the three regulators enable
independently and rise at rates selected by their individual
soft-start capacitors C
diodes are used to connect to a single open-drain pull-down
device (not shown); this allows one FET to disable both
channels. When enabled, they will each rise at their own
ramp rate. If they could use the same ramp rate, then both
pins could share one capacitor and the one FET, and the
diodes are not necessary. The 3rd channel is disabled and
ramped independently.
Since the EN trip point is around 1V, some care should be
taken to guarantee the diode drop and the FET in series
with it will always be below it (including manufacturing
tolerances, temperature extremes, etc.); schottky diodes,
with their lower voltage drop, are preferred. Also, beware of
diodes with high reverse leakage, especially at high
temperatures. If the pull-down FET also has a pull-up
resistor to 12V, for example (not recommended), then the
SS/EN pin could be pulled too high, and interfere with
normal operation; the voltage on the EN pins should not
exceed VCC.
FIGURE 7. CONNECTIONS FOR INDEPENDENT ENABLE
LOGIC SIGNALS
OPEN-DRAIN
EN1
EN2
EN3
AND SOFT-START
C
SS1
SS1
C
SS2
, C
SS2
C
, and C
SS3
SS3
SS1/EN1
SS2/EN2
SS3/EN3
. In Figure 8, two
November 18, 2005
FN9134.2