ISL6534CRZ Intersil, ISL6534CRZ Datasheet - Page 21

• Manufacturer Part Number: ISL6534CRZ
• Description: IC CTRLR PWM DUAL LINEAR 32QFN
• Manufacturer: Intersil

Specifications of ISL6534CRZ

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (1)
• Function: Any Function
• Number Of Outputs: 3
• Frequency - Switching: 300kHz ~ 1MHz
• Voltage/current - Output 1: Controller
• Voltage/current - Output 2: Controller
• Voltage/current - Output 3: Controller
• W/led Driver: No
• W/supervisor: No
• W/sequencer: Yes
• Voltage - Supply: 3.3 V ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 20 shows the upper gate drive supplied by a direct
connection to VCC12. This option should only be used in
converter systems where the main input voltage is +5 VDC
or less. The peak upper gate-to-source voltage is
approximately VCC12 less the input supply. For +5V main
power and +12 VDC for the VIN bias, the gate-to-source
voltage of Q1 is 7V. A logic-level MOSFET may be a good
choice for Q1 (again, check the max gate voltage ratings)
and a logic-level MOSFET can be used for Q2 if its absolute
gate-to-source voltage rating exceeds the maximum voltage
applied to VCC12.
Bootstrap Trade-offs
Bootstrapping to 12V requires that the upper FET have a
maximum gate-source rating of greater than 12V. Since the
LGATE output is sourced from the VCC12 supply in all
cases, the lower FET must also have the high rating. So this
may rule out using some 20V breakdown FETs that have
gate ratings of 12V or less.
Figure 19 shows the diode D
C
used as a local decoupling cap to GND; it should be placed
near the anode of the diode to GND.
The anode of the diode is shown tied to VCC12, but it can
also connect to VCC (even in the shunt regulator mode in
some cases) or to VIN or to another appropriate supply. If
the shunt voltage is used for bootstrapping, it does increase
the current used in the shunt; check that the shunt voltage is
not affected; if it is, a lower value of shunt resistor may be
necessary.
Figure 20 shows the direct hookup; the advantage is that two
components (D
possible disadvantage is that the VCC12 may not be the
optimum voltage for efficiency (perhaps a bootstrap
diode/capacitor to 5V would be better, for example).
(CHANNEL
BOOT
FIGURE 20. UPPER GATE DRIVE - DIRECT VCC12 DRIVE
1 OR 2)
+
ISL6534
-
+12V
. A small capacitor (~1µF; not shown) is sometimes
VCC12
PGND
VCC12
GND
OPTION
BOOT
BOOT
UGATE
LGATE
PGND
and C
BOOT
BOOT
21
) are not needed; a
Q1
PHASE
Q2
and bootstrap capacitor
+5V OR LESS
D2 (OPTIONAL)
V
NOTE:
NOTE:
V
G-S
G-S
≈ V
≈ VCC12
CC12
- 5V
ISL6534
The PHASE node is not brought into the ISL6534, so there is
no way to reference the gate voltage to it, as is often done in
other regulators. The considerations for the BOOT2 pin are
identical to BOOT1; but since they may have different VIN,
VOUT, FETs, etc., the preferred solution for each output may
be different for any given system.
The voltage required on V
diode anode) depends primarily on the upper NFET r
and V
possible, which should help the overall efficiency; however,
the high voltage makes the switching power in the gate
driver higher, which lowers the efficiency. So the net overall
effect is a trade-off between the two. At the other extreme, a
low voltage must be at least as high as the FET threshold
voltage, plus a few volts of overdrive, in order to turn on the
NFET hard enough to source the maximum load current. So
the r
driver power is lower, which helps the efficiency.
Since the gate driver power is a function of (voltage)
theoretical optimum V
enough to turn on the NFET to handle the maximum load.
However, since there are usually only a few available power
supplies to choose from, the user often must compromise.
And sometimes the only supply available is the same one
used for VIN, which may be good for one term, but not as
good for the other.
The size of the bootstrap capacitor can be chosen by using
the following equations:
The last equation plugs in some typical values: N = 1; Q
33nC, VIN is 12V, V
C
as a starting value. The bootstrap capacitors usually need to
be rated at 16V, to handle the typical 12V boot.
In general, as the number of FETs or the size of the FETs
increases (which usually makes Q
bootstrap supply (if not VIN) increases (for example, from 5V
to 12V), these all require that C
C
C
where
N is the number of upper FETs
Q
VIN is the input voltage
V
∆V is the change in boot voltage before and immediately
after the transfer of charge; typically 0.7V to 1.0V
BOOT
BOOT
BOOT
GS
G
DS(ON)
is the total gate charge per upper FET
th
is the gate-source voltage (usually VIN - diode drop)
. A high voltage makes the r
≥
≥
≥ 0.051µF. This value is often rounded up to 0.1µF
Q
------------------- -
Q
------------------- -
GATE
GATE
∆V
∆V
is not as low, hurting the efficiency, but the gate
=
N Q
-----------------------------------
and
GS
V
•
GS
BOOT
G
is 11V, ∆V
•
•
BOOT
Q
∆V
VIN
GATE
voltage is to make it only high
=
BOOT
(Bootstrap Voltage; the
1 33 12
--------------------------- -
max
=
11 0.7
G
•
DS(ON)
N Q
---------------------------------- -
larger) or if VIN or the
•
become larger.
= 1V. In this example,
•
•
V
G
GS
=
•
as low as
VIN
0.051µF
November 18, 2005
2
DS(ON)
, the
FN9134.2
G
is