ISL6534CRZ Intersil, ISL6534CRZ Datasheet - Page 8

• Manufacturer Part Number: ISL6534CRZ
• Description: IC CTRLR PWM DUAL LINEAR 32QFN
• Manufacturer: Intersil

Specifications of ISL6534CRZ

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (1)
• Function: Any Function
• Number Of Outputs: 3
• Frequency - Switching: 300kHz ~ 1MHz
• Voltage/current - Output 1: Controller
• Voltage/current - Output 2: Controller
• Voltage/current - Output 3: Controller
• W/led Driver: No
• W/supervisor: No
• W/sequencer: Yes
• Voltage - Supply: 3.3 V ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Specifications
NOTES:
ENABLE/SOFT-START (SS/EN 1, 2, 3)
Enable Threshold
Noise Immunity (noise de-glitch)
Soft-Start Current
Soft-Start High Voltage
Output High Voltage
FS/SYNC PLL
Min Frequency Range of Lock-In
Max Frequency Range of Lock-In
Maximum High Voltage
BOOT PINS (BOOT1, 2)
High Voltage
GATE DRIVERS
Output Voltage
Output Voltage
Upper Driver Source Resistance
Lower Driver Source Resistance
Upper Driver Sink Resistance
Lower Driver Sink Resistance
GATE DRIVERS SWITCHING TIME
UGATE Rise Time
UGATE Fall Time
UGATE Rise Time
UGATE Fall Time
LGATE Rise Time
LGATE Fall Time
5. Operating range is: 12V ±10%; 5V ±5% for no shunt regulator; 12V ±10%; VCC5 = ~5.8V (approximate shunt voltage at a shunt current of
6. Thermal comments.
7. Design guidance only; not production tested.
8. The maximum output voltage of VOUT3 can go higher than 3.3V, with the proper precautions. These include making sure: the input voltage is
9. The maximum output voltage of VOUT1 and VOUT2 is determined by the following factors: the VIN (usually 12V or less; take into account its
20mA). The accuracy specs are slightly different for the two cases.
higher than the desired output, with sufficient current available; the DRIVE3 voltage can go high enough to drive the FET, with an acceptable
V
min and max variation as well); the maximum duty cycle (with a perfect 12V input, that limits the output to 10.5V); the bootstrap voltage used;
the FETs chosen. Since the upper FET will be on most of the time, it must be sized accordingly. The output capacitors also need to be rated for
the higher voltage.
GS
for the load current desired; the FET is chosen and mounted to handle the power dissipation at full load.
PARAMETER
8
Operating Conditions: V
EN Rising
EN falling
(Note 7)
I
End of ramp
To select DDR mode; (see Table 1)
Use a 10k series resistor (from LG pin of another IC, for example)
Maximum DC Voltage with respect to GND; also depends upon
VIN, Phase, VOUT, and threshold of NFET; ringing should not
exceed max rating of BOOT (36V)
UGATE1, UGATE2; DC maximum voltage
LGATE1, LGATE2; DC maximum voltage = VCC12
UGATE1, UGATE2 = 3V; BOOT = 12V; I
LGATE1, LGATE2 = 3V; I
UGATE1, UGATE2 = 3V; BOOT = 12V; I
LGATE1, LGATE2 = 3V; I
10% - 90%; 2nF Load; BOOT = 12V
90% - 10%; 2nF Load; BOOT = 12V
10% - 90%; 2nF Load; BOOT = 24V
90% - 10%; 2nF Load; BOOT = 24V
10% - 90%; 2nF Load
90% - 10%; 2nF Load
SS
CC
= 5V, V
TEST CONDITIONS
ISL6534
GATE
GATE
CC12
= 100mA
= 100mA
= 12V, T
GATE
GATE
A
= 0°C to 70°C, Unless Otherwise Specified (Continued)
= 100mA
= 100mA
MIN
1000
3.3V
TYP
1.05
0.95
13.2
300
-30
4.7
2.8
2.8
12
27
27
17
17
27
25
17
17
6
2
2
MAX
VCC
November 18, 2005
UNITS
FN9134.2
kHz
kHz
µA
µs
ns
ns
ns
ns
ns
ns
Ω
Ω
Ω
Ω
V
V
V
V
V
V
V
V