ISL6534CRZ Intersil, ISL6534CRZ Datasheet - Page 17

• Manufacturer Part Number: ISL6534CRZ
• Description: IC CTRLR PWM DUAL LINEAR 32QFN
• Manufacturer: Intersil

Specifications of ISL6534CRZ

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (1)
• Function: Any Function
• Number Of Outputs: 3
• Frequency - Switching: 300kHz ~ 1MHz
• Voltage/current - Output 1: Controller
• Voltage/current - Output 2: Controller
• Voltage/current - Output 3: Controller
• W/led Driver: No
• W/supervisor: No
• W/sequencer: Yes
• Voltage - Supply: 3.3 V ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A possible side benefit of tying off the linear is gaining
additional control over the PGOOD timing. Using one of the
above methods, the PGOOD will become active after the
2nd switcher ramps up. But if you want to add a delay after
that, one way to do it is to add a cap on SS/EN3, and make
the ramp longer than the other two; then PGOOD would not
become active until the longest one finishes, effectively
creating a delay (from when SS/EN3 starts). Another option
is to externally hold down SS/EN3, and then release it after a
fixed delay, with or without an additional ramp delay.
Externally switching SS/EN3 to GND can also make
PGOOD go inactive, without having to shut down VOUT1 or
VOUT2.
The maximum VOUT3 voltage allowed is determined by
several factors: the power dissipation, as described earlier;
the input voltage available, the DRIVE3 voltage, and the FET
chosen. The voltage can’t be any higher than the input
voltage available; let’s assume we use 12V. The DRIVE3
voltage is driven from the VCC12 rail; allowing for headroom,
the typical maximum voltage is 9V (lower as VCC12 goes to
its minimum). So the maximum output voltage will be a V
drop below the 9V (which includes the FET threshold
voltage), at the maximum load current, as determined by the
FET characteristics. So a practical value around 7-8V is
possible.
This is a low drop-out linear regulator. For any input voltage
below the maximum above, where the DRIVE3 voltage is not
limited by the FET threshold voltage, the drop-out is
determined mainly by the FET V
words, the maximum voltage drop across the FET at the
maximum load current is what determines the Vin - Vout
difference. This can be less than 0.1V for big FETs or
relatively low max current ratings.
Connecting One Input from Another Output
Often, one of the 3 outputs generated is used as the input
voltage to a 2nd (and perhaps 3rd); the general case
includes inputs or outputs of other IC regulators as well. This
can be done, with a few precautions in mind.
1. The first output must be designed and sized for its own
2. The sequencing of the outputs must be consistent. The
3. The output capacitor of the first is now also the input
load current, plus the expected input current of the other
channels.
first output cannot be disabled or have a much slower
SS/EN ramp than the input channel, in order to take full
advantage of the soft-start. If the VIN is not present when
the 2nd regulator tries to start up, that can be interpreted
as a short-circuit, and the whole IC could be shut down.
capacitor of the 2nd, so it needs to be chosen and sized
for both conditions. For example, transients on the first
output show up on the input of the 2nd; and input current
transients on the 2nd can affect the output of the first.
There may also be trade-offs of the placement of the
17
DS
voltage drop. In other
GS
ISL6534
Feedback Compensation
The compensation required for VOUT1 and VOUT2 is
similar to many other switching regulators, and the same
tools can be used to determine their component values.
VOUT1 and VOUT2 are similar with respect to the
compensation; the only difference is their reference voltages
(fixed ~0.6V versus REFIN, which does not directly affect the
component values). The schematics show type-3
compensation, which is recommended for the general case;
the simpler type-2 compensation is a subset. A simple rule of
thumb is that when bulk capacitors are used on the outputs,
the ESR is often high enough (10’s - 100mΩ) to use type-2
compensation. But if only ceramic capacitors (ESR ~ 1’s
mΩ) or other low-ESR capacitors are used on the outputs,
then most likely type-3 will be required. The reference
designators in these figures match the equations given in
this section, but may not match other figures in this data
sheet. Each switcher output should be calculated separately.
CAUTIONS:
4. The linear regulator has no short-circuit protection.
1. If two (or more) different kinds of output capacitors are
2. There is a restriction on the size of capacitor C2 (see
3. If the compensation is not properly matched with the rest
4. Check with your local Intersil Field Applications for help in
various capacitors; some might be near the output FETs
of the first, and some near the input FETs of the 2nd.
However, if VIN3 is connected to one of the switcher
outputs, a short on the linear output may be detected; but
it is subject to all the cautions mentioned in the SHORT-
CIRCUIT PROTECTION section.
used, their effective ESR and capacitor values cannot be
easily combined into one for modeling. This can lead to
stability problems, and in some cases can also cause
unwanted shutdowns during start-up. But the use of
different capacitor types for output filters is generally
considered a good practice and can improve
performance; the key is modeling them accurately.
Figure 15; this is the single capacitor from COMP to FB);
it is recommended that the capacitor C2 be kept to less
than 500 pF. During start-up, with low voltages and
limited slew rate, the smaller value will allow for adequate
drive current capability. Some designs can and do work
with higher values; there are other factors that can affect
the performance; this recommendation just minimizes the
chances of a start-up problem.
of the circuit, it is possible that noise coupled from the
output can affect the COMP pin, such that it can exceed
the voltage and time levels for tripping the output short-
circuit protection. For example, type-3 compensation has
high bandwidth, and may not be right for some designs.
Choose the appropriate bandwidth and gain to meet the
design goals.
choosing compensation values for these special cases;
improved tools are available to help calculate values and
predict acceptable performance.
November 18, 2005
FN9134.2