M52S128324A-7BG ELITE SEMICONDUCTOR, M52S128324A-7BG Datasheet - Page 23

IC, SDRAM, 128MBIT, 143MHZ, FBGA-90

M52S128324A-7BG

Manufacturer Part Number
M52S128324A-7BG
Description
IC, SDRAM, 128MBIT, 143MHZ, FBGA-90
Manufacturer
ELITE SEMICONDUCTOR
Datasheet

Specifications of M52S128324A-7BG

Memory Type
DRAM - Sychronous
Memory Configuration
2M X 16
Ic Interface Type
Parallel
Memory Case Style
FBGA
No. Of Pins
90
Operating Temperature Range
0°C To +70°C
Frequency
133MHz
Filter Terminals
SMD
Rohs Compliant
Yes
Page Size
128MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ESMT
6. Precharge
.
7. Auto Precharge
*Note : 1. t
Elite Semiconductor Memory Technology Inc.
C L K
C M D
C L K
D Q
D Q
1 ) N o r m a l W r i t e ( B L = 4 )
2. Number of valid output data after row precharge : 1,2 for CAS Latency = 2,3 respectively.
3. The row active command of the precharge bank can be issued after t
1 ) N o r m a l W r i t e ( B L = 4 )
The new read/write command of other activated bank can be issued from this point.
At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.
RDL
W R
D 0
W R
: Last data in to row precharge delay.
D 0
D 1
D 1
D 2
D 2
D 3
t
* N o t e 1
R D L
D 3
A u t o P r e c h a r g e s t a r t s
t
R D L
P R E
* N o t e 3
D Q ( C L 3 )
D Q ( C L 2 )
D Q ( C L 3 )
D Q ( C L 2 )
C M D
C M D
C L K
C M D
C L K
2 ) N o r m a l R e a d ( B L = 4 )
2 ) N o r m a l R e a d ( B L = 4 )
R D
R D
RP
from this point.
Q0
Publication Date: Mar. 2008
Revision: 1.3
Q0
Q0
A u t o P r e c h a r g e s t a r t s
M52S128324A
Q1
Q 0
Q1
P R E
P R E C L = 3
Q2
Q1
Q 2
Q1
* N o t e 3
C L = 2
Q3
Q2
Q3
Q2
1 * N o t e 2
Q3
Q3
2 * N o t e 2
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