M52S128324A-7BG ELITE SEMICONDUCTOR, M52S128324A-7BG Datasheet - Page 43

IC, SDRAM, 128MBIT, 143MHZ, FBGA-90

M52S128324A-7BG

Manufacturer Part Number
M52S128324A-7BG
Description
IC, SDRAM, 128MBIT, 143MHZ, FBGA-90
Manufacturer
ELITE SEMICONDUCTOR
Datasheet

Specifications of M52S128324A-7BG

Memory Type
DRAM - Sychronous
Memory Configuration
2M X 16
Ic Interface Type
Parallel
Memory Case Style
FBGA
No. Of Pins
90
Operating Temperature Range
0°C To +70°C
Frequency
133MHz
Filter Terminals
SMD
Rohs Compliant
Yes
Page Size
128MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
B A 0 , B A 1
C L O C K
A 1 0 / A P
ESMT
Self Refresh Entry & Exit Cycle
*Note : TO ENTER SELF REFRESH MODE
Elite Semiconductor Memory Technology Inc.
A D D R
C K E
D Q M
C A S
R A S
W E
D Q
C S
1. CS , RAS & CAS with CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.
3. The device remains in self refresh mode as long as CKE stays “Low”.
TO EXIT SELF REFRESH MODE
4. System clock restart and be stable before returning CKE high.
5. CS starts from high.
6. Minimum t
7. 4K cycle of burst auto refresh is required before self refresh entry and after self refresh exit if the system uses burst
cf.) Once the device enters self refresh mode, minimum t
refresh.
0
S e l f R e f r e s h E n t r y
1
* N o t e 1
t
S S
RC
2
is required after CKE going high to complete self refresh exit.
H i - Z
* N o t e 2
3
4
5
6
* N o t e 3
7
8
9
RAS
S e l f R e f r e s h E x i t
1 0
* N o t e 4
is required before exit from self refresh.
H i - Z
1 1
* N o t e 5
1 2
1 3
t
R C m i n
Publication Date: Mar. 2008
Revision: 1.3
1 4
* N o t e 6
M52S128324A
A u t o R e f r e s h
1 5
* N o t e 7
1 6
1 7
: D o n ' t c a r e
1 8
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1 9

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