EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 173

32-Bit Microcontroller IC

EP9301-IQZ

Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9301-IQZ

Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1250

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9301-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
VICxIntSelect
VICxIntEnable
DS785UM1
31
15
31
15
Definition:
Bit Descriptions:
Address:
Definition:
Bit Descriptions:
Address:
Default: 0x0000_0000
30
14
30
14
29
13
29
13
28
12
28
12
The VICxRawIntr register provides the status of the source interrupts (and
software interrupts) to the interrupt controller.
RawIntr:
VIC1IntSelect: 0x800B_000C - Read/Write
VIC2IntSelect: 0x800C_000C - Read/Write
Interrupt Select Register. The VICxIntSelect register selects whether the
corresponding interrupt source generates an FIQ or an IRQ interrupt.
IntSelect:
VIC1IntEnable: 0x800B_0010 - Read/Write
VIC2IntEnable: 0x800C_0010 - Read/Write
27
11
27
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
Shows the status of the interrupts before masking by the
enable registers. A “1” indicates that the corresponding
interrupt request is active before masking.
Selects type of interrupt for interrupt request:
1 = FIQ interrupt
0 = IRQ interrupt.
24
24
8
8
IntEnable
IntEnable
IntSelect
IntSelect
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
Vectored Interrupt Controller
19
19
3
3
EP93xx User’s Guide
18
18
2
2
17
17
1
1
16
16
6-11
0
0
6

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