EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 96

32-Bit Microcontroller IC

EP9301-IQZ

Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9301-IQZ

Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1250

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9301-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
3
3-26
MaverickCrunch Co-Processor
EP93xx User’s Guide
31:28
31:28
31:28
cond
cond
cond
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
1 1 1 0
1 1 1 0
1 1 1 0
27:24
27:24
27:24
Move Lower Half 64-bit Integer from ARM to MaverickCrunch
Move Lower Half 64-bit Integer from MaverickCrunch to ARM
Move Upper Half 64-bit Integer from ARM to MaverickCrunch
Moves the lower half of a 64-bit integer from an ARM register into the lower
half of a MaverickCrunch register and sign extend it.
CFMV64LR<cond> CRn, Rd
CRn:
Rd:
Moves the lower half of a 64-bit integer stored in a MaverickCrunch register
into an ARM register.
CFMVR64L<cond> Rd, CRn
Rd:
CRn:
Moves the upper half of a 64-bit integer from an ARM register into the upper
half of a MaverickCrunch register.
CFMV64HR<cond> CRn, Rd
CRn:
Rd:
23:22
23:22
23:22
0 0
0 0
0 0
21
21
21
0
0
0
Copyright 2007 Cirrus Logic
20
20
20
0
1
0
Destination register
Source ARM register
Destination ARM register
Source register
Destination register
Source ARM register
19:16
19:16
19:16
CRn
CRn
CRn
15:12
15:12
15:12
Rd
Rd
Rd
0 1 0 1
0 1 0 1
0 1 0 1
11:8
11:8
11:8
0 0 0
0 0 0
0 0 1
7:5
7:5
7:5
4
1
4
1
4
1
DS785UM1
CRm
CRm
CRm
3:0
3:0
3:0

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