EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 503
EP9301-IQZ
Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9301-IQZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1250
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 503 of 824
- Download datasheet (13Mb)
DS785UM1
Table
Length, respectively.
When using a 32-bit wide external memory bus, the following Read addresses must be used
to set up the specified parameters, where H can be 0x0, 0xC, 0xD, 0xE or 0xF as shown in
Table
Note: “RFU” means Reserved for Future Use.
• SDRAM default READ Address: 0xH000_C800 — sets WBM=0, TM=0, CAS=3,
• SFLASH default READ Address: 0xH008_C800 — sets WBM=1, TM=0, CAS=3,
• SROM default READ Address: 0xH001_8400 — sets RAS=2, CAS=5, Sequential, BL=4
Sequential, BL=4
Sequential, BL=4
RAS = 0
RAS = 1
BT = 0
BT = 1
WBM = 0
WBM = 1
Burst Length
13-6,
13-2:
Value
000
001
010
100
101
011
110
111
CAS Value
Table
Table 13-7. Sync Memory RAS, Burst Type, and Write Burst Length
000
001
010
011
100
101
110
111
13-7, and
Not applicable
Not applicable
Sequential
Interleaved
Use BL value
Write Burst = 1
Table 13-8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SDRAM
Table 13-6. Sync Memory CAS
Copyright 2007 Cirrus Logic
4
8
Table 13-8. Burst Length
SDRAM
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SDRAM
2
3
show the bit field values for CASL, RAS, and Burst
SDRAM, SyncROM, and SyncFLASH Controller
SFLASH
Reserved
Reserved
Reserved
Reserved
Reserved
SFLASH
Reserved
Reserved
Reserved
Reserved
Not applicable
Not applicable
Sequential
Interleaved
Use BL value
Write Burst = 1
1
2
3
SFLASH
1
2
4
8
1 clk
2 clk
Sequential
Interleaved
Use BL value
Not applicable
Reserved
SROM
SROM
Reserved
Reserved
2
3
4
5
6
7
8
SROM
EP93xx User’s Guide
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8
13-7
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