DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 164

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: SAPI Octet Not Equal to
LI.RX86S.SAPIHNE generates an interrupt.
Bit 2: SAPI Octet Not Equal to
LI.RX86S.SAPILNE generates an interrupt.
Bit 1: Control Not Equal to
generates an interrupt.
Bit 0: Address Not Equal to
generates an interrupt.
Bits 7 to 0: Transmit Queue Low Threshold (TQLT[7:0]). The transmit queue low threshold for the connection,
in increments of 32 packets of 2048 bytes each. The value of this register is multiplied by 32 x 2048 bytes to
determine the byte location of the threshold. Note that the transmit queue is for data that was received from the
Serial Interface to be sent to the Ethernet Interface.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Transmit Queue High Threshold (TQHT[7:0]). The transmit queue high threshold for the connection,
in increments of 32 packets of 2048 bytes each. The value of this register is multiplied by 32 x 2048 bytes to
determine the byte location of the threshold. Note that the transmit queue is for data that was received from the
Serial Interface to be sent to the Ethernet Interface.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
TQHT7
TQLT7
—
7
0
7
0
7
0
TQHT6
TQLT6
—-
6
0
6
0
6
0
LI.TRX8C
LI.TRX86A
LI.RX86LSIE
Receive X.86 Interrupt Enable
123h
LI.TQLT
Serial Interface Transmit Queue Low Threshold (Watermark)
124h
LI.TQHT
Serial Interface Transmit Queue High Threshold (Watermark)
125h
LI.TRX86SAPIH
LI.TRX86SAPIL
TQLT5
TQHT5
—
5
0
5
0
5
0
Interrupt Enable (CNE3LIM). If this bit is set to 1, LI.RX86S.CNE
Interrupt Enable (ANE4IM). If this bit is set to 1, LI.RX86S.ANE
TQLT4
TQHT4
164 of 335
—-
4
0
4
0
Interrupt Enable (SAPINEFEIM). If this bit is set to 1,
0
4
Interrupt Enable (SAPINE01IM). If this bit is set to 1,
SAPINE01IM
TQHT3
TQLT3
3
0
3
0
3
0
SAPINEFEIM
TQHT2
TQLT2
2
0
2
0
2
0
TQLT1
TQHT1
CNE3LI
1
0
1
0
M
1
0
ANE4IM
TQLT0
TQHT0
0
0
0
0
0
0