DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 291

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 6: Receive Framed/Unframed Select (RFUS)
Bit 4: Transmit Byte-Align Toggle (TBAT). A 0-to-1 transition forces the BERT to byte align its pattern with the
transmit formatter. This bit must be transitioned in order to byte align the Daly pattern.
Bit 3: Transmit Framed/Unframed Select (TFUS)
Bit 1: BERT Direction (BERTDIR)
Bit 0: BERT Enable (BERTEN)
0 = network
BERT transmits toward the network (TTIP and TRING) and receives from the network (RTIP and RRING). The
BERT pattern can be looped back to the receiver internally by using the framer loopback function.
1 = system
BERT transmits toward the system backplane (RSERO) and receives from the system backplane (TSERI).
0 = BERT disabled
1 = BERT enabled
0 = BERT is not sent data from the F-bit position (framed)
1 = BERT is sent data from the F-bit position (unframed)
0 = BERT does not source data into the F-bit position (framed)
1 = BERT does source data into the F-bit position (unframed)
—
7
0
TR.BIC
BERT Interface Control Register
EAh
RFUS
6
0
—
5
0
291 of 335
TBAT
4
0
TFUS
3
0
—
2
0
BERTDIR
1
0
BERTEN
0
0