DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 165

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Transmit FIFO Overflow for Connection Interrupt Enable (TFOVFIE). If this bit is set, the watermark
interrupt is enabled for TFOVFLS.
Bit 2: Transmit Queue Overflow for Connection Interrupt Enable (TQOVFIE). If this bit is set, the watermark
interrupt is enabled for TQOVFLS.
Bit 1: Transmit Queue for Connection High Threshold Interrupt Enable (TQHTIE). If this bit is set, the
watermark interrupt is enabled for TQHTS.
Bit 0: Transmit Queue for Connection Low Threshold Interrupt Enable (TQLTIE). If this bit is set, the
watermark interrupt is enabled for TQLTS.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Transmit Queue FIFO Overflowed Latched Status (TFOVFLS). This bit is set if the transmit queue FIFO
has overflowed. This register is cleared after a read. This FIFO is for data to be transmitted from the HDLC to be
sent to the SDRAM.
Bit 2: Transmit Queue Overflow Latched Status (TQOVFLS). This bit is set if the transmit queue has
overflowed. This register is cleared after a read.
Bit 1: Transmit Queue for Connection Exceeded High Threshold Latched Status (TQHTLS). This bit is set if
the transmit queue crosses the high watermark. This register is cleared after a read.
Bit 0: Transmit Queue for Connection Exceeded Low Threshold Latched Status (TQLTLS). This bit is set if
the transmit queue crosses the low watermark. This register is cleared after a read.
—-
—-
—-
7
0
7
—-
—-
—-
6
0
6
LI.TQTIE
Serial Interface Transmit Queue Cross Threshold Interrupt Enable
126h
LI.TQCTLS
Serial Interface Transmit Queue Cross Threshold Latched Status
127h
—-
—-
—-
5
5
0
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—-
—-
—-
4
0
4
TFOVFLS
TFOVFIE
—-
3
0
3
TQOVFLS
TQOVFIE
—-
2
0
2
TQHTLS
TQHTIE
—-
1
1
0
TQLTLS
TQLTIE
—-
0
0
0