DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 268
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DS33R41
Manufacturer Part Number
DS33R41
Description
Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R41.pdf
(335 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: Writing this register resets the detector’s integration period.
Bit 7: Receive Up-Code Definition Bit 7 (C7). First bit of the repeating pattern.
Bit 6: Receive Up-Code Definition Bit 6 (C6). A don’t care if a 1-bit length is selected.
Bit 5: Receive Up-Code Definition Bit 5 (C5). A don’t care if a 1-bit or 2-bit length is selected.
Bit 4: Receive Up-Code Definition Bit 4 (C4). A don’t care if a 1-bit to 3-bit length is selected.
Bit 3: Receive Up-Code Definition Bit 3 (C3). A don’t care if a 1-bit to 4-bit length is selected.
Bit 2: Receive Up-Code Definition Bit 2 (C2). A don’t care if a 1-bit to 5-bit length is selected.
Bit 1: Receive Up-Code Definition Bit 1 (C1). A don’t care if a 1-bit to 6-bit length is selected.
Bit 0: Receive Up-Code Definition Bit 0 (C0). A don’t care if a 1-bit to 7-bit length is selected.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Receive Up-Code Definition Bits 7 to 0 (C7 to C0). A don’t care if a 1-bit to 7-bit length is selected.
C7
C7
7
0
7
0
TR.RUPCD1
Receive Up-Code Definition Register 1
B9h
TR.RUPCD2
Receive Up-Code Definition Register 2
BAh
C6
C6
6
0
6
0
C5
C5
5
0
5
0
268 of 335
C4
C4
4
0
4
0
C3
C3
3
0
3
0
C2
C2
2
0
2
0
C1
C1
1
0
1
0
C0
C0
0
0
0
0
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