DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 226

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: RSERO Control (RSERC)
Bit 6: Receive Signaling Mode Select (RSIGM)
Bit 5: Receive HDB3 Enable (RHDB3)
Bit 4: Receive G.802 Enable (RG802). See Section
Bit 3: Receive CRC4 Enable (RCRC4)
Bit 2: Frame Resync Criteria (FRC)
Bit 1: Sync Enable (SYNCE)
Bit 0: Resync (RESYNC). When toggled from low to high, a resync is initiated. Must be cleared and set again for a
subsequent resync.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0: Receive Carrier-Loss (RCL) Alternate Criteria (RCLA). Defines the criteria for a receive carrier-loss
condition for both the framer and LIU.
0 = allow RSERO to output data as received under all conditions
1 = force RSERO to 1 under loss-of-frame alignment conditions
0 = CAS signaling mode
1 = CCS signaling mode
0 = HDB3 disabled
1 = HDB3 enabled
0 = do not force RCHBLK high during bit 1 of time slot 26
1 = force RCHBLK high during bit 1 of time slot 26
0 = CRC4 disabled
1 = CRC4 enabled
0 = resync if FAS received in error three consecutive times
1 = resync if FAS or bit 2 of non-FAS is received in error three consecutive times
0 = auto resync enabled
1 = auto resync disabled
0 = RCL declared upon 255 consecutive 0s (125μs)
1 = RCL declared upon 2048 consecutive 0s (1ms)
RSERC
—
7
0
7
0
TR.E1RCR1
E1 Receive Control Register 1
33h
TR.E1RCR2
E1 Receive Control Register 2
34h
RSIGM
—
6
0
6
0
RHDB3
—
5
0
5
0
226 of 335
RG802
10.10
—
4
0
4
0
for details.
RCRC4
—
3
0
3
0
FRC
—
2
0
2
0
SYNCE
—
1
0
1
0
RESYNC
RCLA
0
0
0
0