DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 222
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
DS33R41
Manufacturer Part Number
DS33R41
Description
Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R41.pdf
(335 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 6: Bit-Error Detected Event (BBED)
Bit 5: BERT Bit-Counter Overflow Event (BBCO)
Bit 4: BERT Error-Counter Overflow Event (BECO)
Bit 3: Receive All-Ones Condition (BRA1)
Bit 2: Receive All-Zeros Condition (BRA0)
Bit 1: Receive Loss-of-Synchronization Condition (BRLOS)
Bit 0: BERT in Synchronization Condition (BSYNC)
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled—interrupts on rising and falling edges
0 = interrupt masked
1 = interrupt enabled—interrupts on rising and falling edges
0 = interrupt masked
1 = interrupt enabled—interrupts on rising and falling edges
0 = interrupt masked
1 = interrupt enabled—interrupts on rising and falling edges
—
7
0
TR.IMR9
Interrupt Mask Register 9
27h
BBED
6
0
BBCO
5
0
222 of 335
BEC0
4
0
BRA1
3
0
BRA0
2
0
BRLOS
1
0
BSYNC
0
0
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