DS33R41 Maxim Integrated Products, DS33R41 Datasheet - Page 2

• Manufacturer Part Number: DS33R41
• Description: Network Controller & Processor ICs Inverse-Multiplexing Ethernet Mapper wit
• Manufacturer: Maxim Integrated Products

1
2
3
4
5
6
7
8
9
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10 L
2.11 MAC I
2.12 C
2.13 J
2.14 S
2.15 T
2.16 S
6.1
7.1
8.1
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10 A
9.11 F
DESCRIPTION ................................................................................................................................... 9
FEATURE HIGHLIGHTS.................................................................................................................. 11
APPLICATIONS ............................................................................................................................... 15
ACRONYMS AND GLOSSARY ....................................................................................................... 16
MAJOR OPERATING MODES ........................................................................................................ 17
BLOCK DIAGRAMS......................................................................................................................... 18
PIN DESCRIPTIONS ........................................................................................................................ 21
FUNCTIONAL DESCRIPTION ......................................................................................................... 33
8.1.1
8.1.2
8.1.3
ETHERNET MAPPER ...................................................................................................................... 36
9.1.1
9.1.2
9.8.1
9.8.2
9.8.3
9.8.4
G
M
L
HDLC E
X.86 (L
A
C
SDRAM I
T1/E1/J1 F
F
P
P
E
R
I
G
P
D
S
L
C
NITIALIZATION AND
ITTER
INK
INE
INK
EST AND
RAMER
LOW
DDITIONAL
YSTEM
PECIFICATIONS
IN
ROCESSOR
THERNET
ER
ERIAL
RBITER
OMMITTED
LOCK
ESETS AND
EVICE
ONNECTIONS AND
ENERAL
LOBAL
ICROPROCESSOR
F
Read-Write/Data Strobe Modes............................................................................................................35
Clear on Read .......................................................................................................................................35
Interrupt and Pin Modes........................................................................................................................35
Serial Interface Clock Modes ................................................................................................................38
Ethernet Interface Clock Modes............................................................................................................38
Microprocessor Requirements ..............................................................................................................45
IMUX Command Protocol .....................................................................................................................46
Out of Frame (OOF) Monitoring............................................................................................................48
Data Transfer ........................................................................................................................................48
-P
A
I
A
UNCTIONAL
NTERFACE
C
GGREGATION
NTERFACE
ORT
GGREGATION
A
S
INK
I
I
ONTROL
NTERFACE
/LIU I
R
THERNET
NTERRUPTS
I
TTENUATOR
YNTHESIZER
....................................................................................................................................... 50
NTERFACE
...................................................................................................................................... 11
NTERFACE
ESOURCES
D
M
R
A
RAMER
IAGNOSTICS
HDLC C
I
CCESS
ESOURCES
I
APPER
L
NFORMATION
NTERFACE
NTERIM
OW
............................................................................................................................ 13
............................................................................................................................ 51
C
........................................................................................................................... 13
D
-P
M
OMPLIANCE
ESCRIPTION
........................................................................................................................ 12
........................................................................................................................ 43
C
I
Q
P
OWER
NTERFACE
(I
APPING
...................................................................................................................... 12
...................................................................................................................... 14
C
(IMUX) .......................................................................................................... 43
..................................................................................................................... 13
..................................................................................................................... 41
ONTROLLERS IN THE
ONFIGURATION
.................................................................................................................... 13
.................................................................................................................... 41
UEUES
ROTOCOL FOR
NVERSE
S
LOCKS
IGNALS
................................................................................................................ 14
................................................................................................................ 41
............................................................................................................... 34
R
M
.......................................................................................................... 11
ATE
ODES
......................................................................................................... 36
......................................................................................................... 49
M
....................................................................................................... 14
...................................................................................................... 11
...................................................................................................... 20
...................................................................................................... 21
TABLE OF CONTENTS
ULTIPLEXING
(CIR) C
................................................................................................ 39
.............................................................................................. 40
SONET/SDH) E
ONTROLLERS
I
2 of 335
NTEGRATED
) ............................................................................... 11
THERNET
.................................................................. 12
T1/E1/J1 T
M
APPING
RANSCEIVER
....................................... 11
............................ 12