82V2042EPF8 IDT, Integrated Device Technology Inc, 82V2042EPF8 Datasheet - Page 36

• Manufacturer Part Number: 82V2042EPF8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2042EPF8

• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

3.9
3.9.1
IDT82V2042E:
•
•
Table-17 EXZ Definition
3.9.2
zero errors and PRBS logic errors) will be counted is determined by
ERR_SEL[1:0] bits (MAINT6, 12H...). Only one type of receiving error can
be counted at a time except that when the ERR_SEL[1:0] bits are set to ‘11’,
both CV/BPV and EXZ errors will be detected and counted.
Counter. Once an error is detected, an error interrupt which is indicated by
corresponding bit in (INTS1, 19H...) will be generated if it is not masked.
This Error Counter can be operated in two modes: Auto Report Mode and
Manual Report Mode, as selected by the CNT_MD bit (MAINT6, 12H...).
In Single Rail mode, once BPV or CV errors are detected, the CVn pin will
be driven to high for one RCLK period.
errors when the CNT_MD bit (MAINT6, 12H...) is set to ‘1’. A one-second
timer is used to set the counting period. The received errors are counted
within one second. If the one-second timer expires, the value in the internal
counter will be transferred to (CNT0, 1AH...) and (CNT1, 1BH...), then the
internal counter will be reset and start to count received errors for the next
second. The errors occurred during the transfer will be accumulated to the
next round. The expiration of the one-second timer will set TMOV_IS bit
(INTS1, 19H...) to ‘1’, and will generate an interrupt if the TIMER_IM bit
(INTM1, 14H...) is set to ‘0’. The TMOV_IS bit (INTS1, 19H...) will be cleared
after the interrupt register is read. The content in the (CNT0, 1AH...) and
(CNT1, 1BH...) should be read within the next second. If the counter over-
flows, a counter overflow interrupt which is indicated by CNT_OV_IS bit
(INTS1, 19H...) will be generated if it is not masked by CNT_IM bit (INTM1,
14H...).
FUNCTIONAL DESCRIPTION
IDT82V2042E
The following line encoding errors can be detected and counted by the
Which type of the receiving errors (Received CV/BPV errors, excess
The selected type of receiving errors is counted in an internal 16-bit Error
• Auto Report Mode
In Auto Report Mode, the internal counter starts to count the received
Received Bipolar Violation (BPV) Error: In AMI coding, when two
consecutive pulses of the same polarity are received, a BPV error
is declared.
HDB3/B8ZS Code Violation (CV) Error: In HDB3/B8ZS coding, a
CV error is declared when two consecutive BPV errors are
HDB3
B8ZS
AMI
ERROR DETECTION/COUNTING AND INSERTION
DEFINITION OF LINE CODING ERROR
ERROR DETECTION AND COUNTING
More than 15 consecutive zeros are detected
More than 3 consecutive zeros are detected
More than 7 consecutive zeros are detected
ANSI
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
36
•
received errors when the CNT_MD bit (MAINT6, 12H...) is set to ‘0’. When
there is a ‘0’ to ‘1’ transition on the CNT_TRF bit (MAINT6, 12H...), the data
in the counter will be transferred to (CNT0, 1AH...) and (CNT1, 1BH...), then
the counter will be reset. The errors occurred during the transfer will be
accumulated to the next round. If the counter overflows, a counter overflow
interrupt indicated by CNT_OV_IS bit (INTS1, 19H...) will be generated if
it is not masked by CNT_IM bit (INTM1, 14H...).
EXZ Definition
• Manual Report Mode
In Manual Report Mode, the internal Error Counter starts to count the
detected, and the pulses that have the same polarity as the previ-
ous pulse are not the HDB3/B8ZS zero substitution pulses.
Excess Zero (EXZ) Error: There are two standards defining the
EXZ errors: ANSI and FCC. The EXZ_DEF bit (MAINT6, 12H...)
chooses which standard will be adopted by the corresponding
channel to judge the EXZ error.
In hardware
N
read the data in CNT0, CNT1 within
the next second
Figure-17 Auto Report Mode
CNT0, CNT1
counter
control
More than 80 consecutive zeros are detected
More than 3 consecutive zeros are detected
More than 7 consecutive zeros are detected
One-Second Timer expired?
Bit TMOV_IS is cleared after
the interrupt register is read
Bit TMOV_IS is set to '1'
Auto Report Mode
mode, only ANSI standard is adopted.
(CNT_MD=1)
counting
0
data in counter
Y
FCC
Table-17
shows definition of EXZ.
December 12, 2005
same process
next second
repeats the