82V2042EPF8 IDT, Integrated Device Technology Inc, 82V2042EPF8 Datasheet - Page 71
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82V2042EPF8
Manufacturer Part Number
82V2042EPF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V2042EPF8.pdf
(83 pages)
Specifications of 82V2042EPF8
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
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Table-63 Transmitter and Receiver Timing Characteristics
1.Relative to nominal frequency, MCLK= ± 100 ppm
2.RCLK duty cycle widths will vary depending on extent of received pulse jitter displacement. Maximum and minimum RCLK duty cycles are for worst case jitter conditions (0.2UI displacement
3.For all digital outputs. C load = 15pF
Transmit path
t1
t2
Receive path
t4
t5
t6
t7
t8
TEST SPECIFICATIONS
IDT82V2042E
for E1 per ITU G.823).
Symbol
Transmit Data Setup Time
Transmit Data Hold Time
RCLK pulse width high time
Receive Data Setup Time
MCLK frequency
E1:
T1/J1:
MCLK tolerance
MCLK duty cycle
TCLK frequency
E1:
T1/J1:
TCLK tolerance
TCLK Duty Cycle
Delay time of THZ low to driver high impedance
Delay time of TCLK low to driver high impedance
Clock recovery capture
range
RCLK duty cycle
RCLK pulse width
E1:
T1/J1:
RCLK pulse width low time
E1:
T1/J1:
E1:
T1/J1:
Rise/fall time
E1:
T1/J1:
Receive Data Hold Time
E1:
T1/J1:
1
3
2
2
Parameter
E1
T1/J1
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
71
-100
Min
457
607
203
259
203
259
200
200
200
200
-50
40
30
10
40
40
± 180
2.048
1.544
2.048
1.544
± 80
Typ
488
648
244
324
244
324
244
324
244
324
75
50
Max
+50
100
519
689
285
389
285
389
70
90
10
60
20
December 12, 2005
Unit
MHz
ppm
MHz
ppm
ppm
U.I.
ns
ns
us
ns
ns
ns
ns
ns
ns
%
%
%
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