NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 68

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Signal Description
2.14
2.15
68
Table 2-13. Processor Interface Signals (Sheet 2 of 2)
Table 2-14. SM Bus Interface Signals
Table 2-15. System Management Interface Signals
SMBus Interface
System Management Interface
CPUPWRGD /
(Mobile Only) /
SMBALERT#/
LINKALERT#
SMLINK[1:0]
INTRUDER#
SMBDATA
A20GATE
SMBCLK
(Desktop
GPO[49]
DPSLP#
GPI[11]
Name
Name
Name
TP[2]
Only)
OD O
Type
OD I/O
OD I/O
OD I/O
OD I/O
Type
Type
O
I
I
I
A20 Gate: A20GATE is from the keyboard controller. The signal acts as an
alternative method to force the A20M# signal active. It saves the external OR gate
needed with various other chipsets.
Processor Power Good: This signal should be connected to the processor’s
PWRGOOD input to indicate when the processor power is valid. This is an open-
drain output signal (external pull-up resistor required) that represents a logical AND
of the ICH6’s PWROK and VRMPWRGD signals.
This signal may optionally be configured as a GPO.
Deeper Sleep: DPSLP# is asserted by the ICH6 to the processor. When the signal is
low, the processor enters the deep sleep state by gating off the processor Core Clock
inside the processor. When the signal is high (default), the processor is not in the
deep sleep state.
Intruder Detect: This signal can be set to disable system if box detected open.
This signal’s status is readable, so it can be used like a GPI if the Intruder
Detection is not needed.
System Management Link: SMBus link to optional external system management
ASIC or LAN controller. External pull-ups are required. Note that SMLINK0
corresponds to an SMBus Clock signal, and SMLINK1 corresponds to an SMBus
Data signal.
SMLink Alert: Output of the integrated LAN and input to either the integrated
ASF or an external management controller in order for the LAN’s SMLINK slave to
be serviced.
SMBus Data: External pull-up resistor is required.
SMBus Clock: External pull-up resistor is required.
SMBus Alert: This signal is used to wake the system or generate SMI#. If not
used for SMBALERT#, it can be used as a GPI.
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Description
Description
Description