NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 697

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
19.1.32
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
SLSTS—Slot Status Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
15:7
Bit
6
5
4
3
2
1
0
Reserved
Presence Detect State (PDS) — RO. If XCAP.SI (D28:F0/F1/F2/F3:42h:bit 8) is set (indicating that
this root port spawns a slot), then this bit:
0 = Indicates the slot is empty.
1 = Indicates the slot has a device connected.
Otherwise, if XCAP.SI is cleared, this bit is always set (1).
MRL Sensor State (MS) — Reserved as the MRL sensor is not implemented.
Command Completed (CC) — R/WC.
0 = Issued command not completed.
1 = The Hot-Plug controller completed an issued command. This is set when the last message of a
Presence Detect Changed (PDC) — R/WC.
0 = No change in the PDS bit.
1 = The PDS bit changed states.
MRL Sensor Changed (MSC) — Reserved as the MRL sensor is not implemented.
Power Fault Detected (PFD) — Reserved as a power controller is not implemented.
Attention Button Pressed (ABP) — R/WC.
0 = The attention button has not been pressed.
1 = The attention button is pressed.
command is sent and indicates that software can write a new command to the slot controller.
5A
0000h
5Bh
Description
Attribute:
Size:
PCI Express* Configuration Registers
R/WC, RO
16 bits
697

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