FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 159
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
Lead Free Status / RoHS Status
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5.13.10
5.13.10.1
Table 69. Write Only Registers with Read Paths in ALT Access Mode (Sheet 1 of 2)
Intel
Addr
00h
01h
02h
03h
I/O
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Rds
# of
2
2
2
2
Access
ALT Access Mode
Before entering a low power state, several registers from powered down parts may need to be
saved. In the majority of cases, this is not an issue, as registers have read and write paths. However,
several of the ISA compatible registers are either read only or write only. To get data out of
write-only registers, and to restore data into read-only registers, the ICH5 implements an ALT
access mode.
If the ALT access mode is entered and exited after reading the registers of the ICH5 timer (8254),
the timer starts counting faster (13.5 ms). The following steps listed below can cause problems:
After getting control in step #3, if the OS does not reprogram the system timer again, the timer
ticks may be happening faster than expected. For example DOS and its associated software assume
that the system timer is running at 54.6 ms and as a result the time-outs in the software may be
happening faster than expected.
Operating systems (e.g., Microsoft Windows* 98, Windows* 2000, and Windows NT*) reprogram
the system timer and therefore do not encounter this problem.
For some other loss (e.g., Microsoft MS-DOS*) the BIOS should restore the timer back to 54.6 ms
before passing control to the OS. If the BIOS is entering ALT access mode before entering the
suspend state it is not necessary to restore the timer contents after the exit from ALT access mode.
Write Only Registers with Read Paths
in ALT Access Mode
The registers described in
in the table indicates which register will be returned per access to that port.
1
2
1
2
1
2
1
2
1. BIOS enters ALT access mode for reading the ICH5 timer related registers.
2. BIOS exits ALT access mode.
3. BIOS continues through the execution of other needed steps and passes control to the OS.
Restore Data
DMA Chan 0 base address low byte
DMA Chan 0 base address high byte
DMA Chan 0 base count low byte
DMA Chan 0 base count high byte
DMA Chan 1 base address low byte
DMA Chan 1 base address high byte
DMA Chan 1 base count low byte
DMA Chan 1 base count high byte
Data
Table 69
have read paths in ALT access mode. The access number field
Addr
40h
41h
I/O
# of
Rds
7
1
Access
1
2
3
4
5
6
7
Restore Data
Timer Counter 0 status, bits [5:0]
Timer Counter 0 base count low byte
Timer Counter 0 base count high
byte
Timer Counter 1 base count low byte
Timer Counter 1 base count high
byte
Timer Counter 2 base count low byte
Timer Counter 2 base count high
byte
Timer Counter 1 status, bits [5:0]
Functional Description
Data
159
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