FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 66
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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Signal Description
2.21
2.21.1
66
Table 23. Functional Strap Definitions
Pin Straps
Functional Straps
The following signals are used for static configuration. They are sampled at the rising edge of
PWROK to select configurations, and then revert later to their normal usage. To invoke the
associated mode, the signal should be driven at least four PCI clocks prior to the time it is sampled.
LINKALERT#
AC_SDOUT
AC_SYNC
GNT5# /
GPIO17
GNTB /
GNTA#
Signal
SPKR
TP1
Safe Mode
No Reboot
Top-Block
Reserved
Reserved
Reserved
Reserved
Override
Usage
Swap
When Sampled
Rising Edge of
Rising Edge of
Rising Edge of
PWROK
PWROK
PWROK
The signal has a weak internal pull-down. If the signal is
sampled high, the Intel
strap pins for safe mode. Refer to the processor
specification for speed strapping definition. The status of
this strap is readable via the SAFE_MODE bit (bit 2, D31:
F0, Offset D4h).
The signal has a weak internal pull-up. If the signal is
sampled low, this indicates that the system is strapped to
the “top-block swap” mode (ICH5 inverts A16 for all cycles
targeting FWH BIOS space). The status of this strap is
readable via the Top_Swap bit (bit 13, D31: F0, Offset
D4h). Note that software will not be able to clear the Top-
Swap bit until the system is rebooted without GNTA# being
pulled down.
This signal has a weak internal pull-up.
NOTE: This signal should not be pulled low.
This signal has a weak internal pull-down.
NOTE: This signal should not be pulled high.
This signal has a weak internal pull-down.
This signal requires an external pullup resistor.
The signal has a weak internal pull-down. If the signal is
sampled high, this indicates that the system is strapped to
the “No Reboot” mode (ICH5 will disable the TCO timer
system reboot feature). The status of this strap is readable
via the NO_REBOOT bit (bit 1, D31: F0, Offset D4h).
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
®
Comment
ICH5 will set the processor speed
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