FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 248
FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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Functional Description
5.21.7.2
248
Table 122. Read Cycle Format
Format of Read Command
The external master performs Byte Read commands to the ICH5 SMBus Slave I/F. The
“Command” field (bits 18
contain the value that should be read from that register.
Table 123
18:11
27:21
37:30
Bit
8:2
10
19
20
28
29
38
39
1
9
Start
Slave Address — 7 bits
Write
ACK
Command code – 8 bits
ACK
Repeated Start
Slave Address — 7 bits
Read
ACK
Data Byte
NOT ACK
Stop
shows the register mapping for the data byte.
Description
:
11) indicate which register is being accessed. The Data field (bits 30
External Microcontroller
External Microcontroller
External Microcontroller
Intel
External Microcontroller
ICH5
External Microcontroller
External Microcontroller
External Microcontroller
ICH5
ICH5
External Microcontroller
External Microcontroller
®
ICH5
Driven by
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Table 122
Must match value in Receive Slave Address
register
Always 0
Indicates which register is being accessed.
See
Must match value in Receive Slave Address
register
Always 1
Value depends on register being accessed.
See
Table
Table
shows the Read Cycle format.
123.
123.
Comment
:
37)
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