FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 249
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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Intel
®
Table 123. Data Values for Slave Read Registers
82801EB ICH5 / 82801ER ICH5R Datasheet
Register
9–FFh
0
1
1
2
2
3
3
4
4
4
4
4
4
5
5
5
5
6
7
8
Bits
7:0
2:0
7:3
3:0
7:4
5:0
7:6
6:4
7:3
7:0
7:0
7:0
7:0
0
1
2
3
7
0
1
2
Reserved.
System Power State
Reserved
Frequency Strap Register
Reserved
Watchdog Timer current value
Reserved
1 = The Intruder Detect (INTRD_DET) bit is set. This indicates that the system cover has
1 = BTI Temperature Event occurred. This bit will be set if the Intel
Boot-Status. This bit will be 1 when the processor does not fetch the first instruction.
This bit will be set after the TCO timer times out a second time (Both TIMEOUT and
SECOND_TO_STS bits set).
Reserved.
The bit will reflect the state of the GPI11/SMBALERT# signal, and will depend on the
GP_INV11 bit. It does not matter if the pin is configured as GPI11 or SMBALERT#.
Unprogrammed flash BIOS bit. This bit will be 1 to indicate that the first BIOS fetch
returned FFh, which indicates that the flash BIOS is probably blank.
Reserved
CPU Power Failure Status. 1 if the CPUPWR_FLR bit in the GEN_PMCON_2 register is
set.
Reserved
Contents of the Message 1 register. See
Contents of the Message 2 register. See
Contents of the WDSTATUS register. See
Reserved
• 000 = S0
• 001 = S1
• 010 = Reserved
• 011 = S3
• 100 = S4
• 101 = S5
• 110 = Reserved
• 111 = Reserved
• If the GP_INV11 bit is 1, the value of register 4 bit 7 will equal the level of the GPI11/
• If the GP_INV11 bit is 0, the value of register 4 bit 7 will equal the inverse of the level of
SMBALERT# pin (high = 1, low = 0).
the GPI11/SMBALERT# pin (high = 1, low = 0).
probably been opened.
signal is active. Need to take after polarity control.
Description
Section
Section
Section
9.11.9.
9.11.9.
9.11.10.
Functional Description
®
ICH5’s THRM# input
249
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