FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 340
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
Lead Free Status / RoHS Status
Not Compliant
- Current page: 340 of 671
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LPC Interface Bridge Registers (D31:F0)
9.1.32
9.1.33
340
GEN2_DEC—LPC I/F Generic Decode Range 2 Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
FB_SEL2—Flash BIOS Select 2 Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
15:12
15:4
11:8
3:1
7:4
3:0
Bit
Bit
0
Generic I/O Decode Range 2 Base Address (GEN2_BASE) — R/W. This address is aligned on a
64-byte boundary, and must have address lines 31:16 as 0.
Note that this generic decode is for I/O addresses only, not memory addresses. The size of this
range is 16 bytes.
Reserved. Read as 0
Generic I/O Decode Range 2 Enable (GEN2_EN) — R/W.
0 = Disable
1 = Accesses to the GEN2 I/O range will be forwarded to the LPC I/F
FB_70_IDSEL — R/W. IDSEL for two, 1-M flash BIOS memory ranges.
The IDSEL programmed in this field addresses the following memory ranges:
FF70 0000h – FF7F FFFFh
FF30 0000h – FF3F FFFFh
FB_60_IDSEL — R/W. IDSEL for two, 1-M flash BIOS memory ranges.
The IDSEL programmed in this field addresses the following memory ranges:
FF60 0000h – FF6F FFFFh
FF20 0000h – FF2F FFFFh
FB_50_IDSEL — R/W. IDSEL for two, 1-M flash BIOS memory ranges.
The IDSEL programmed in this field addresses the following memory ranges:
FF50 0000h – FF5F FFFFh
FF10 0000h – FF1F FFFFh
FB_40_IDSEL — R/W. IDSEL for two, 1-M flash BIOS memory ranges.
The IDSEL programmed in this field addresses the following memory ranges:
FF40 0000h – FF4F FFFFh
FF00 0000h – FF0F FFFFh
ECh
0000h
Yes
EEh
4567h
–
–
EFh
EDh
Intel
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
R/W
16 bit
Core
R/W
32 bits
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