FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 610
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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Electrical Characteristics
610
Table 186. Ultra ATA Timing (Mode 0, Mode 1, Mode 2) (Sheet 1 of 2)
Sym
t83a
t83b
t84a
t84b
t85a
t85b
t86a
t86b
t92a
t92b
t80
t81
t82
t87
t88
t89
t90
t91
Sustained Cycle Time (T2cyctyp)
Cycle Time (Tcyc)
Two Cycle Time (T2cyc)
Data Setup Time (Tds)
Recipient IC data setup time (from
data valid until STROBE edge)
(see Note 2) (Tdsic)
Data Hold Time (Tdh)
Recipient IC data hold time (from
STROBE edge until data may
become invalid) (see Note 2)
(Tdhic)
Data Valid Setup Time (Tdvs)
Sender IC data valid setup time
(from data valid until STROBE
edge) (see Note 2) (Tdvsic)
Data Valid Hold Time (Tdvh)
Sender IC data valid hold time
(from STROBE edge until data
may become invalid) (see Note 2)
(Tdvhic)
Limited Interlock Time (Tli)
Interlock Time w/ Minimum (Tmli)
Envelope Time (Tenv)
Ready to Pause Time (Trp)
DMACK setup/hold Time (Tack)
CRC Word Setup Time at Host
(Tcvs)
CRC word valid hold time at
sender (from DMACK# negation
until CRC may become invalid)
(see Note 2) (Tcvh)
Parameter (1)
14.7
72.9
Min
112
230
160
4.8
6.2
6.2
15
70
20
20
20
70
5
9
0
Mode 0
(ns)
240
Max
150
Intel
70
®
50.9
82801EB ICH5 / 82801ER ICH5R Datasheet
Min
153
125
9.7
4.8
6.2
6.2
73
10
48
20
20
20
48
5
9
0
Mode 1
(ns)
160
Max
150
70
33.9
Min
115
100
6.8
4.8
6.2
6.2
31
20
20
20
31
54
7
9
5
0
Mode 2
(ns)
120
Max
150
70
Measuring
Intel
See Note 2
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Location
Recipient
Recipient
Recipient
ICH5 ball
ICH5 ball
ICH5 ball
Recipient
Sender
Sender
Sender
Sender
Host
Host
Host
Host
Host
End
ball
®
ICH5
12
12
12
12
12
12
14
14
11
13
11,
14
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