XC3S250E-4FTG256C Xilinx Inc, XC3S250E-4FTG256C Datasheet - Page 106
XC3S250E-4FTG256C
Manufacturer Part Number
XC3S250E-4FTG256C
Description
IC SPARTAN-3E FPGA 250K 256-FTBG
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S250E-4FTG256C
Total Ram Bits
221184
Number Of Logic Elements/cells
5508
Number Of Labs/clbs
612
Number Of I /o
172
Number Of Gates
250000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-LBGA
No. Of Logic Blocks
5508
No. Of Gates
250000
No. Of Macrocells
5508
No. Of Speed Grades
4
No. Of I/o's
190
Clock Management
DLL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1482
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S250E-4FTG256C
Manufacturer:
TOS
Quantity:
3 012
Company:
Part Number:
XC3S250E-4FTG256C
Manufacturer:
XILINX
Quantity:
281
Part Number:
XC3S250E-4FTG256C
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Functional Description
106
instruction
JPROG
Load
Figure 68: Boundary-Scan Configuration Flow Diagram
No
Yes
and V
(JTAG port becomes
Load configuration
and V
INIT_B = High?
Load JSTART
(Clock five 1's
Load CFG_IN
Reconfigure?
Synchronous
configuration
data frames
User mode
V
instruction
Power-On
Yes
instruction
TAP reset
sequence
CCO
Yes
mode pins
Yes
available)
on TMS)
Start-Up
correct?
CCINT
memory
Sample
CCAUX
CRC
Clear
Bank 2 > 1V
www.xilinx.com
>1V
> 2V
No
No
No
INIT_B goes Low.
Abort Start-Up
Yes
Set PROG_B Low
after Power-On
PROG_B = Low
DS312-2_59_051706
No
DS312-2 (v3.8) August 26, 2009
Product Specification
R