XC3S250E-4FTG256C Xilinx Inc, XC3S250E-4FTG256C Datasheet - Page 77

• Manufacturer Part Number: XC3S250E-4FTG256C
• Description: IC SPARTAN-3E FPGA 250K 256-FTBG
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S250E-4FTG256C

• Total Ram Bits: 221184
• Number Of Logic Elements/cells: 5508
• Number Of Labs/clbs: 612
• Number Of I /o: 172
• Number Of Gates: 250000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-LBGA
• No. Of Logic Blocks: 5508
• No. Of Gates: 250000
• No. Of Macrocells: 5508
• No. Of Speed Grades: 4
• No. Of I/o's: 190
• Clock Management: DLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1482

DS312-2 (v3.8) August 26, 2009
Product Specification
PROG_B
Recommend
open-drain
TMS
TDO
TCK
driver
TDI
+2.5V
JTAG
R
Variant Select
SPI Mode
‘0’
‘0’
‘1’
‘1’
‘1’
‘0’
P
Figure 54: Atmel SPI-based DataFlash Configuration Interface
HSWAP
M2
M1
M0
VS2
VS1
VS0
TDI
TMS
TCK
PROG_B
Spartan-3E
VCCINT
FPGA
+1.2V
GND
VCCO_0
VCCAUX
VCCO_2
CSO_B
DONE
INIT_B
DOUT
MOSI
CCLK
TDO
DIN
VCCO_0
+3.3V
+2.5V
www.xilinx.com
I
W
‘1’
+3.3V
P
SI
SO
CS
WP
RESET
RDY/BUSY
SCK
+2.5V
+3.3V
GND
VCC
DataFlash
AT45DB
PROG_B
Atmel
INIT_B
Power-on monitor is only required if
+3.3V (VCCO_2) supply is the last supply
in power-on sequence, after VCCINT
and VCCAUX. Must delay FPGA
configuration for > 20 ms after SPI
DataFlash reaches its minimum VCC.
Force FPGA INIT_B input OR PROG_B
input Low with an open-drain or open-
collector driver.
Power-On
Power-On
Monitor
Monitor
+3.3V
+3.3V
Functional Description
or
DS312-2_50a_082009
77