EP4CE40F29C8N Altera, EP4CE40F29C8N Datasheet - Page 79

• Manufacturer Part Number: EP4CE40F29C8N
• Description: IC CYCLONE IV FPGA 40K 780FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE40F29C8N

• Number Of Logic Elements/cells: 39600
• Number Of Labs/clbs: 2475
• Total Ram Bits: 1134000
• Number Of I /o: 532
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 5: Clock Networks and PLLs in Cyclone IV Devices
PLLs in Cyclone IV Devices
Table 5–5. Cyclone IV GX PLL Features (Part 1 of 2)
© December 2010 Altera Corporation
C (output counters)
M, N, C counter sizes
Dedicated clock outputs
Clock input pins
Spread
PLL cascading
Source
No Compensation Mode
Normal Mode
Zero Delay Buffer Mode
Deterministic Latency Compensation
Mode
Phase shift resolution
Programmable duty cycle
Output counter cascading
Input clock switchover
User mode reconfiguration
Loss of lock detection
PLL drives TX Serial Clock, TX Load
Enable, and TX Parallel Clock
VCO output drives RX clock data
recovery (CDR) clock
- spectrum input clock tracking
- Synchronous Mode
f
Features
1
(9)
Cyclone IV GX devices contain up to eight general purpose PLLs and multipurpose
PLLs while Cyclone IV E devices have up to four general purpose PLLs that provide
robust clock management and synthesis for device clock management, external
system clock management, and high-speed I/O interfaces.
For more information about the number of general purpose PLLs and multipurpose
PLLs in each device density, refer to the
The general I/O pins cannot drive the PLL clock input pins.
Table 5–5
lists the features available in Cyclone IV GX PLLs.
(1),(10)
PLL_1
v
v
v
v
v
v
General Purpose PLLs
(1),(10)
PLL_2
v
v
v
v
v
v
—
PLL_3
(2)
v
v
v
v
—
—
12 single-ended or 6 differential
1 single-ended or 1 differential pair
PLL_4
Cyclone IV Device Family Overview
(3)
v
v
v
v
—
—
Down to 96 ps increments
and 4 differential
PLL_1
Through GCLK
(4)
1 to 512
Availability
v
v
v
v
v
v
v
v
v
v
v
5
(8)
PLL_2
(4)
(5)
v
v
v
v
v
pairs(7)
Cyclone IV Device Handbook, Volume 1
Multipurpose PLLs
(1),(10)
PLL_5
pairs(6)
v
v
v
v
v
v
v
(1),(10)
PLL_6
v
v
—
—
—
chapter.
PLL_7
(1)
v
v
—
—
—
5–17
PLL_8
(1)
v
v
v
v
v