EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 276

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

9–56
Arria II GX Security Protection
Arria II GX Device Handbook, Volume 1
1
Arria II GX devices address these concerns with both volatile and non-volatile
security feature support. Arria II GX devices have the ability to decrypt configuration
bitstreams using the AES algorithm, an industry-standard encryption algorithm that
is FIPS-197 certified. Arria II GX devices have a design security feature which uses a
256-bit security key.
Arria II GX devices store configuration data in SRAM configuration cells during
device operation. Because SRAM memory is volatile, the SRAM cells must be loaded
with configuration data each time the device powers up. It is possible to intercept
configuration data when it is being transmitted from the memory source (flash
memory or a configuration device) to the device. The intercepted configuration data
could then be used to configure another device.
When using the Arria II GX design security feature, the security key is stored in the
Arria II GX device. Depending on the security mode, you can configure the
Arria II GX device using a configuration file that is encrypted with the same key, or
for board testing, configured with a normal configuration file.
The design security feature is available when configuring Arria II GX devices using
the FPP configuration mode with an external host (such as a MAX II device or
microprocessor), or when using AS or PS configuration schemes. The design security
feature is also available in remote update mode with AS configuration. The design
security feature is not available when you are configuring your Arria II GX device
using JTAG-based configuration. For more information, refer to
Configuration Schemes” on page
When using a serial configuration scheme such as PS or AS, configuration time is the
same whether or not you enable the design security feature. If you use the FPP
scheme with the design security or decompression feature, a ×4 DCLK is required. This
results in a slower configuration time when compared to the configuration time of an
Arria II GX device that has neither the design security nor the decompression feature
enabled.
Arria II GX device designs are protected from copying, reverse engineering, and
tampering using configuration bitstream encryption.
Security Against Copying
The security key is securely stored in the Arria II GX device and cannot be read out
through any interface. In addition, as configuration file read-back is not supported in
Arria II GX devices, your design information cannot be copied.
Security Against Reverse Engineering
Reverse engineering from an encrypted configuration file is very difficult and time
consuming because the Arria II GX configuration file formats are proprietary and the
file contains millions of bits which require specific decryption. Reverse engineering
the Arria II GX device is just as difficult because the device is manufactured on the
most advanced 40-nm process technology.
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II GX Devices
9–60.
© July 2010 Altera Corporation
“Supported
Design Security