Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 12
Z8018010PSG
Manufacturer Part Number
Z8018010PSG
Description
IC 10MHZ Z180 CMOS ENH MPU 64DIP
Manufacturer
Zilog
Specifications of Z8018010PSG
Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
64
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
8018010
Rohs Compliant
Yes
Clock Frequency
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3889
Z8018010PSG
Z8018010PSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8018010PSG
Manufacturer:
Zilog
Quantity:
40
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List of Tables
Z80180, Z8S180, Z8L180 MPU Operation . . . . . . . . . . . . . . . . . . . .1
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Status Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Multiplexed Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . .12
Memory Wait States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Wait State Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Power-Down Modes
(Z8S180/Z8L180-Class Processor Only) . . . . . . . . . . . . . .37
I/O Address Map for Z80180-Class Processors Only . . . . .44
I/O Address Map
(Z8S180/Z8L180-Class Processors Only) . . . . . . . . . . . . .48
State of IEF1 and IEF2. . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
Vector Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82
RETI Control Signal States . . . . . . . . . . . . . . . . . . . . . . . . .85
DRAM Refresh Intervals . . . . . . . . . . . . . . . . . . . . . . . . . .89
Channel 0 Destination . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98
Channel 0 Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99
Transfer Mode Combinations . . . . . . . . . . . . . . . . . . . . . . .99
Channel 1 Transfer Mode . . . . . . . . . . . . . . . . . . . . . . . . .102
DMA Transfer Request . . . . . . . . . . . . . . . . . . . . . . . . . . .110
Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
Divide Ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
ASCI Baud Rate Selection . . . . . . . . . . . . . . . . . . . . . . . . .142
Clock Mode Bit Values . . . . . . . . . . . . . . . . . . . . . . . . . . .144
2^ss Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145
CSI/O Baud Rate Selection . . . . . . . . . . . . . . . . . . . . . . . .150
Family MPU User Manual
UM005003-0703
Z8018x
xiv
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